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參數(shù)資料
| 型號(hào)： | MT9VDDT1672A |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | DDR SDRAM DIMM |
| 中文描述： | DDR SDRAM的內(nèi)存 |
| 文件頁(yè)數(shù)： | 26/29頁(yè) |
| 文件大小： | 542K |
| 代理商： | MT9VDDT1672A |
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128MB, 256MB (x72, ECC)
184-Pin DDR SDRAM DIMM
09005aef808f8ccd
DD9C16_32X72AG_B.fm - Rev. B 2/03 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
26
2003 Micron Technology. Inc.
30
Minimum RAS# Pulse Width,
t
RAS
42ns (-335)
45ns (-262/-265/-26A)
40ns (-202)
128MB or 256MB
0.8ns (-335)
1.0ns (-262/-265/-26A)
1.1ns (-202)
0.8ns (-335)
1.0ns (-262/-265/-26A)
1.1ns (-202)
0.45ns (-335
0.5ns (-262/-265/-26A)
0.6ns (-202)
0.45ns (-335
0.5ns (-262/-265/-26A)
0.6ns (-202)
2A
2D
28
20
80
A0
B0
80
A0
B0
45
50
60
45
50
60
00
3C
41
46
48
4B
50
30
34
2D
32
3C
60
75
A0
00
00
2A
2D
28
40
80
A0
B0
80
A0
B0
45
50
60
45
50
60
00
3C
41
46
48
4B
50
30
34
2D
32
3C
60
75
A0
00
00
33
B7
E8
18
B3
2C
00
31
32
Module Rank Density
Address and Command Setup Time,
t
IS
(See note 3)
33
Address and Command Hold Time,
t
IH
(See note 3)
34
Data/Data Mask Input Setup Time,
t
DS
35
Data/Data Mask Input Hold Time,
t
DH
36-40
41
Reserved
Minimum Active/Auto Refresh Time, (
t
RC)
60ns (-335/-262)
65ns (-265/-26A)
70ns (-202)
72ns (-335)
75ns (-262/-265/-26A)
80ns (-202)
12ns (-335)
13ns (-202/-265/-26A/-262)
0.45ns (-335)
0.5ns (-262-265/-26A)
0.6ns (-202)
0.6ns (-335)
0.75ns (-262/-265/-26A)
1ns (-202)
42
Minimum Auto Refresh to Active/ Auto
Refresh Command Period, (
t
RFC)
43
Maximum Cycle Time, (
t
CK (MAX))
44
Maximum DQS-DQ Skew Time, (
t
DQSQ)
45
Maximum Read Data Hold Skew Factor, (
t
QHS)
46-61
62
63
Reserved
SPD Revision
Checksum for Bytes 0–62
Release 0.0
-335
-262
-26A
-265
-202
MICRON
na
/10 (See note 2)
94
05/C5 (See note 2)
35/F5 (See note 2)
D0/90 (See note 2)
2C
00
01–0B
Variable Data
01–09
00
Variable Data
64
Manufacturer’s JEDEC ID Code
Manufacturer’s JEDEC ID Code (Continued)
Manufacturing Location
Module Part Number (ASCII)
PCB Identification Code
Identification Code (Continued)
Year of Manufacture in BCD
65-71
72
73-90
91
92
93
01–11
01–0B
Variable Data
01–09
00
Variable Data
1–9
0
Table 20: Serial Presence-Detect Matrix (Continued)
“1”/“0”: Serial Data, “driven to HIGH”/“driven to LOW”; notes at end of SPD Matrix
BYTE
DESCRIPTION
ENTRY (VERSION)
MT9VDDT1672A
MT9VDDT3272A
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PDF描述 |
|---|---|
| MT9VDDT3272A | DDR SDRAM DIMM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9VDDT1672AG-202A1 | 制造商:Micron Technology Inc 功能描述:DRAM MOD DDR SDRAM 1.125GBIT 184UDIMM - Trays |
| MT9VDDT1672AG-265B1 | 制造商:Micron Technology Inc 功能描述:DRAM MOD DDR SDRAM 1.125GBIT 184UDIMM - Trays |
| MT9VDDT1672AG-265D4 | 制造商:Micron Technology Inc 功能描述: |
| MT9VDDT1672AG-26AA1 | 制造商:Micron Technology Inc 功能描述:DRAM MOD DDR SDRAM 1.125GBIT 184UDIMM - Trays |
| MT9VDDT1672AG-26AB1 | 制造商:Micron Technology Inc 功能描述:DRAM MOD DDR SDRAM 1.125GBIT 184UDIMM - Trays |
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