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| 型號： | MT9VDDT1672A |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | DDR SDRAM DIMM |
| 中文描述： | DDR SDRAM的內(nèi)存 |
| 文件頁數(shù)： | 12/29頁 |
| 文件大?。?/td> | 542K |
| 代理商： | MT9VDDT1672A |
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128MB, 256MB (x72, ECC)
184-Pin DDR SDRAM DIMM
09005aef808f8ccd
DD9C16_32X72AG_B.fm - Rev. B 2/03 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
12
2003 Micron Technology. Inc.
Commands
The Truth Tables below provides a general reference
of available commands. For a more detailed descrip-
tion of commands and operations, refer to the 128Mb
and 256Mb DDR SDRAM component data sheets.
NOTE:
1. CKE is HIGH for all commands shown except SELF REFRESH.
2. DESELECT and NOP are functionally interchangeable.
3. BA0–BA1 provide device bank address and A0–A11 (128MB) or A0–A12 (256MB) provide device row address.
4. BA0–BA1 provide device bank address; A0–A9 provide device column address; A10 HIGH enables the auto precharge
feature (nonpersistent), and A10 LOW disables the auto precharge feature.
5. Applies only to read bursts with auto precharge disabled; this command is undefined (and should not be used) for
read bursts with auto precharge enabled and for write bursts.
6. A10 LOW: BA0–BA1 determine which device bank is precharged. A10 HIGH: all device banks are precharged and
BA0–BA1 are “Don’t Care.”
7. This command is AUTO REFRESH if CKE is HIGH, SELF REFRESH if CKE is LOW.
8. Internal refresh counter controls device row addressing; all inputs and I/Os are “Don’t Care” except for CKE.
9. BA0-BA1 select either the mode register or the extended mode register (BA0 = 0, BA1 = 0 select the mode register;
BA0 = 1, BA1 = 0 select extended mode register; other combinations of BA0–BA1 are reserved). A0–A11 (for 128MB
module) or A0–A12 (for 256MB module) provide the op-code to be written to the selected mode register.
Table 8:
Notes: 1
Truth Table – Commands
NAME (FUNCTION)
CS#
H
L
L
L
L
L
L
L
L
RAS# CAS#
X
H
L
H
H
H
L
L
L
WE#
X
H
H
H
L
L
L
H
L
ADDR
X
X
Bank/Row
Bank/Col
Bank/Col
X
Code
X
Op-Code
NOTES
2
2
3
4
4
5
6
7, 8
9
DESELECT (NOP)
NO OPERATION (NOP)
ACTIVE (Select bank and activate row)
READ (Select bank and column, and start READ burst)
WRITE (Select bank and column, and start WRITE burst)
BURST TERMINATE
PRECHARGE (Deactivate row in bank or banks)
AUTO REFRESH or SELF REFRESH (Enter self refresh mode)
LOAD MODE REGISTER
X
H
H
L
L
H
H
L
L
Table 9:
Used to mask write data; provided coincident with the corresponding data
Truth Table – DM Operation
NAME (FUNCTION)
DM
L
H
DQS
Valid
X
WRITE Enable
WRITE Inhibit
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9VDDT1672AG-202A1 | 制造商:Micron Technology Inc 功能描述:DRAM MOD DDR SDRAM 1.125GBIT 184UDIMM - Trays |
| MT9VDDT1672AG-265B1 | 制造商:Micron Technology Inc 功能描述:DRAM MOD DDR SDRAM 1.125GBIT 184UDIMM - Trays |
| MT9VDDT1672AG-265D4 | 制造商:Micron Technology Inc 功能描述: |
| MT9VDDT1672AG-26AA1 | 制造商:Micron Technology Inc 功能描述:DRAM MOD DDR SDRAM 1.125GBIT 184UDIMM - Trays |
| MT9VDDT1672AG-26AB1 | 制造商:Micron Technology Inc 功能描述:DRAM MOD DDR SDRAM 1.125GBIT 184UDIMM - Trays |
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