- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385641 > MT9VDDT1672A (Micron Technology, Inc.) DDR SDRAM DIMM PDF資料下載
參數(shù)資料
| 型號： | MT9VDDT1672A |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | DDR SDRAM DIMM |
| 中文描述： | DDR SDRAM的內(nèi)存 |
| 文件頁數(shù)： | 11/29頁 |
| 文件大?。?/td> | 542K |
| 代理商： | MT9VDDT1672A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
128MB, 256MB (x72, ECC)
184-Pin DDR SDRAM DIMM
09005aef808f8ccd
DD9C16_32X72AG_B.fm - Rev. B 2/03 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
11
2003 Micron Technology. Inc.
enabling of the DLL should always be followed by a
LOAD MODE REGISTER command to the mode regis-
ter (BA0/BA1 both low) to reset the DLL.
The extended mode register must be loaded when
all device banks are idle and no bursts are in progress,
and the controller must wait the specified time before
initiating any subsequent operation. Violating either
of these requirements could result in unspecified oper-
ation.
DLL Enable/Disable
The DLL must be enabled for normal operation.
DLL enable is required during power-up initialization
and upon returning to normal operation after having
disabled the DLL for the purpose of debug or evalua-
tion. (When the device exits self refresh mode, the DLL
is enabled automatically.) Any time the DLL is
enabled, 200 clock cycles must occur before a READ
command can be issued.
Figure 7: Extended Mode Register
Definition Diagram
NOTE:
1. E13 and E12 (128MB module), or E14 and E13
(256MB Module) (BA1 and BA0) must be “0, 1” to
select the Extended Mode Register (vs. the base
Mode Register).
2. The QFC# option is not supported.
Operating Mode
Reserved
Reserved
0
–
0
–
Valid
–
0
1
DLL
Enable
Disable
DLL
11
01
A9
A7 A6 A5 A4 A3
A8
A2 A1 A0
Extended Mode
Register (Ex)
Address Bus
9
Operating Mode
7
6
5
4
3
8
2
2
1
0
E0
0
Drive Strength
Normal
E1
E0
E1,
A10
A11
A12
BA1BA0
10
11
12
13
14
E3
E4
0
–
0
–
0
–
0
–
0
–
E6 E5
E7
E8
E9
0
–
0
–
E10
E11
0
–
E12
DS
DLL
11
01
A9
A7 A6 A5 A4 A3
A8
A2 A1 A0
Extended Mode
Register (Ex)
Address Bus
9
7
6
5
4
3
8
2
2
1
0
Operating Mode
A10
A11
BA1BA0
10
11
12
13
DS
128MB Module
256MB Module
0
–
E2
2
相關PDF資料 |
PDF描述 |
|---|---|
| MT9VDDT3272A | DDR SDRAM DIMM |
| MTB2P50E | Power MOSFET 2 Amps, 500 Volts(2A, 500V功率MOSFET) |
| MTB50P03HDL | Power MOSFET 50 Amps, 30 Volts, Logic Level(50A, 30V, D2PAK, P溝道功率MOSFET) |
| MTD20N06HDLT4 | Power MOSFET 20 Amps, 60 Volts, Logic Level N−Channel DPAK |
| MTD20N06HDLT4G | Power MOSFET 20 Amps, 60 Volts, Logic Level N−Channel DPAK |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MT9VDDT1672AG-202A1 | 制造商:Micron Technology Inc 功能描述:DRAM MOD DDR SDRAM 1.125GBIT 184UDIMM - Trays |
| MT9VDDT1672AG-265B1 | 制造商:Micron Technology Inc 功能描述:DRAM MOD DDR SDRAM 1.125GBIT 184UDIMM - Trays |
| MT9VDDT1672AG-265D4 | 制造商:Micron Technology Inc 功能描述: |
| MT9VDDT1672AG-26AA1 | 制造商:Micron Technology Inc 功能描述:DRAM MOD DDR SDRAM 1.125GBIT 184UDIMM - Trays |
| MT9VDDT1672AG-26AB1 | 制造商:Micron Technology Inc 功能描述:DRAM MOD DDR SDRAM 1.125GBIT 184UDIMM - Trays |
發(fā)布緊急采購，3分鐘左右您將得到回復。