參數(shù)資料
型號: MT48V2M32LFFC
廠商: Micron Technology, Inc.
英文描述: 512K x 32 x 4 banks 2.5V SDRAM(2.5V,512K x 32 x 4組同步動態(tài)RAM)
中文描述: 為512k × 32 × 4銀行2.5V的內(nèi)存電壓(2.5V,512K采樣× 32 × 4組同步動態(tài)RAM)的
文件頁數(shù): 47/50頁
文件大?。?/td> 1058K
代理商: MT48V2M32LFFC
47
64Mb: x32 SDRAM, 2.5V
BatRam_25V.p65 – Rev. 0.7, Pub. 2/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc.
64Mb: x32, 2.5V
SDRAM
PRELIMINARY
ALTERNATING BANK WRITE ACCESSES
1
NOTE:
1. For this example, the burst length = 4.
2. This fast frequency,
t
WR >
t
CK, requires “ two clocks”.
3. A8 and A9 = “ Don’t Care”
*CAS latency indicated in parentheses.
-8
-10
SYMBOL*
t
CMS
t
DH
t
DS
t
RAS
t
RC
t
RCD
t
RP
t
RRD
t
WR
MIN
2.5
1
2.5
48
68
20
20
20
1 CLK +
7ns
MAX
MIN
2.5
1
2.5
50
70
20
20
20
1 CLK +
5ns
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
120,000
120,000
TIMING PARAMETERS
-8
-10
SYMBOL*
t
AH
t
AS
t
CH
t
CL
t
CK (3)
t
CK (2)
t
CK (1)
t
CKH
t
CKS
t
CMH
MIN
1
2.5
3
3
8
13
25
1
2.5
1
MAX
MIN
1
2.5
3
3
10
13
25
1
2.5
1
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DON’T CARE
UNDEFINED
tCH
tCL
tCK
CLK
DQ
D
IN
m
tDH
tDS
D
IN
m
+ 1
D
IN
m
+ 2
D
IN
m
+ 3
COMMAND
tCMH
NOP
NOP
tCMS
ACTIVE
NOP
WRITE
NOP
NOP
ACTIVE
tDH
tDS
tDH
tDS
tDH
tDS
ACTIVE
WRITE
D
IN
b
tDH
tDS
D
IN
b
+ 1
D
IN
b
+ 3
tDH
tDS
tDH
tDS
ENABLE AUTO PRECHARGE
A10
tCMH
tCMS
tAH
tAS
tAH
tAS
tAH
tAS
ROW
ROW
ROW
ROW
ENABLE AUTO PRECHARGE
ROW
ROW
BANK 0
BANK 0
BANK 1
CKE
tCKH
tCKS
D
IN
b
+ 2
tDH
tDS
COLUMN
b
3
COLUMN
m
3
tRP - BANK 0
tRAS - BANK 0
t
RC - BANK 0
tRCD - BANK 0
t
t
RCD - BANK 0
tWR
2
- BANK 0
WR - BANK 4
tRCD - BANK 4
t
RRD
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
BA0, BA1
DQM 0-3
A0-A9
BANK 0
BANK 1
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