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參數(shù)資料
| 型號： | MT48V2M32LFFC |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 512K x 32 x 4 banks 2.5V SDRAM(2.5V,512K x 32 x 4組同步動態(tài)RAM) |
| 中文描述： | 為512k × 32 × 4銀行2.5V的內(nèi)存電壓（2.5V，512K采樣× 32 × 4組同步動態(tài)RAM）的 |
| 文件頁數(shù)： | 28/50頁 |
| 文件大?。?/td> | 1058K |
| 代理商： | MT48V2M32LFFC |
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28
64Mb: x32 SDRAM, 2.5V
BatRam_25V.p65 – Rev. 0.7, Pub. 2/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc.
64Mb: x32, 2.5V
SDRAM
PRELIMINARY
TRUTH TABLE 4 – CURRENT STATE BANK
n
- COMMAND TO BANK
m
(Notes: 1-6; notes appear below and on next page)
CURRENT STATE CS# RAS#CAS# WE#
Any
H
L
Idle
X
Row
L
Activating,
L
Active, or
L
Precharging
L
Read
L
(Auto-
L
Precharge
L
Disabled)
L
Write
L
(Auto-
L
Precharge
L
Disabled)
L
Read
L
(With Auto-
L
Precharge)
L
L
Write
L
(With Auto-
L
Precharge)
L
L
COMMAND (ACTION)
COMMAND INHIBIT (NOP/Continue previous operation)
NO OPERATION (NOP/Continue previous operation)
Any Command Otherwise Allowed to Bank m
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
NOTES
X
H
X
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
X
H
X
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
X
H
X
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
7
7
7, 10
7, 11
9
7, 12
7, 13
9
7, 8, 14
7, 8, 15
9
7, 8, 16
7, 8, 17
9
NOTE:
1. This table applies when CKE
was HIGH and CKE
n
is HIGH (see Truth Table 2) and after
t
XSR has been met (if the
previous state was self refresh).
2. This table describes alternate bank operation, except where noted; i.e., the current state is for bank
n
and the
commands shown are those allowed to be issued to bank
m
(assuming that bank m is in such a state that the given
command is allowable). Exceptions are covered in the notes below.
3. Current state definitions:
Idle: The bank has been precharged, and
t
RP has been met.
Row Active: A row in the bank has been activated, and
t
RCD has been met. No data bursts/accesses and no
register accesses are in progress.
Read: A READ burst has been initiated, with auto precharge disabled, and has not yet terminated or
been terminated.
Write: A WRITE burst has been initiated, with auto precharge disabled, and has not yet terminated or
been terminated.
Read w/Auto-
Precharge Enabled: Starts with registration of a READ command with auto precharge enabled, and ends when
t
RP
has been met. Once
t
RP is met, the bank will be in the idle state.
Write w/Auto-
Precharge Enabled: Starts with registration of a WRITE command with auto precharge enabled, and ends when
t
RP
has been met. Once
t
RP is met, the bank will be in the idle state.
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