參數(shù)資料
型號(hào)： MT48H8M16LFB4-8IT:JTR
元件分類： DRAM
英文描述： 8M X 16 SYNCHRONOUS DRAM, 6 ns, PBGA54
封裝： 8 X 8 MM, LEAD FREE, VFBGA-54
文件頁(yè)數(shù)： 59/61頁(yè)
文件大?。?/td> 2469K
PDF: 09005aef8237e877/Source: 09005aef8237e8d8
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mb_x16 Mobile SDRAM_Y25M_2.fm - Rev. A 6/06 EN
7
2006 Micron Technology, Inc. All rights reserved.
128Mb: x16 Mobile SDRAM
General Description
Preliminary
Table 3:
Ball Descriptions
54-BALL FBGA
SYMBOL
TYPE
DESCRIPTION
F2
CLK
Input
Clock: CLK is driven by the system clock. All SDRAM input signals are
sampled on the positive edge of CLK. CLK also increments the internal
burst counter and controls the output registers.
F3
CKE
Input
Clock Enable: CKE activates (HIGH) and deactivates (LOW) the CLK signal.
Deactivating the clock provides PRECHARGE POWER-DOWN and SELF
REFRESH operation (all banks idle), ACTIVE POWER-DOWN (row active in
any bank), DEEP POWER-DOWN (all banks idle), or CLOCK SUSPEND
operation (burst/access in progress). CKE is synchronous except after the
device enters power-down and self refresh modes, where CKE becomes
asynchronous until after exiting the same mode. The input buffers,
including CLK, are disabled during power-down and self refresh modes,
providing low standby power. CKE may be tied HIGH.
G9
CS#
Input
Chip Select: CS# enables (registered LOW) and disables (registered HIGH)
the command decoder. All commands are masked when CS# is registered
HIGH. CS# provides for external bank selection on systems with multiple
banks. CS# is considered part of the command code.
F7, F8, F9
CAS#, RAS#,
WE#
Input
Command Inputs: CAS#, RAS#, and WE# (along with CS#) define the
command being entered.
E8, F1
DQML,
DQMH
Input
Input/Output Mask: DQM is sampled HIGH and is an input mask signal for
write accesses and an output enable signal for read accesses. Input data is
masked during a WRITE cycle. The output buffers are placed in a High-Z
state (two-clock latency) when during a READ cycle. LDQM corresponds to
DQ0–DQ7, UDQM corresponds to DQ8–DQ15. LDQM and UDQM are
considered same state when referenced as DQM.
G7, G8
BA0, BA1
Input
Bank Address Input(s): BA0 and BA1 define to which bank the ACTIVE,
READ, WRITE or PRECHARGE command is being applied. These balls also
select between the mode register and the extended mode register.
H7, H8, J8, J7, J3, J2, H3,
H2, H1, G3, H9, G2
A0–A11
Input
Address Inputs: A0–A11 are sampled during the ACTIVE command (row-
address A0–A11) and READ/WRITE command (column-address A0–A7;
with A10 defining auto precharge) to select one location out of the
memory array in the respective bank. A10 is sampled during a
PRECHARGE command to determine if all banks are to be precharged
(A10 HIGH) or bank selected by BA0, BA1 (LOW). The address inputs also
provide the op-code during a LOAD MODE REGISTER command.
A8, B9, B8, C9, C8, D9,
D8, E9, E1, D2, D1, C2,
C1, B2, B1, A2
DQ0–DQ15
I/O
Data Input/Output: Data bus.
E2, G1
NC
–
Internally Not Connected: These could be left unconnected, but it is
recommended they be connected or VSS. G1 is a no connect for this part
but may be used as A12 in future designs.
A7, B3, C7, D3
VDDQ
Supply DQ Power: Provide isolated power to DQs for improved noise immunity.
A3, B7, C3, D7
VSSQ
Supply DQ Ground: Provide isolated ground to DQs for improved noise immunity.
A9, E7, J9
VDD
Supply Core Power Supply.
A1, E3, J1
VSS
Supply Ground.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT48H8M16LFF3-7E 制造商:Micron Technology Inc 功能描述:
MT48H8M16LFF4-10 功能描述:IC SDRAM 128MBIT 100MHZ 54VFBGA RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869
MT48H8M16LFF4-10 IT 功能描述:IC SDRAM 128MBIT 100MHZ 54VFBGA RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869
MT48H8M16LFF4-8 功能描述:IC SDRAM 128MBIT 125MHZ 54VFBGA RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869
MT48H8M16LFF4-8 IT 功能描述:IC SDRAM 128MBIT 125MHZ 54VFBGA RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869
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