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| 型號(hào)： | MT48H8M16LFB4-8IT:JTR |
| 元件分類： | DRAM |
| 英文描述： | 8M X 16 SYNCHRONOUS DRAM, 6 ns, PBGA54 |
| 封裝： | 8 X 8 MM, LEAD FREE, VFBGA-54 |
| 文件頁(yè)數(shù)： | 26/61頁(yè) |
| 文件大?。?/td> | 2469K |
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PDF: 09005aef8237e877/Source: 09005aef8237e8d8
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mb_x16 Mobile SDRAM_Y25M_2.fm - Rev. A 6/06 EN
32
2006 Micron Technology, Inc. All rights reserved.
128Mb: x16 Mobile SDRAM
Power-Down
Preliminary
Concurrent Auto Precharge
Micron SDRAM devices support concurrent auto precharge, which allows an access
command (READ or WRITE) to another bank while an access command with auto
precharge enabled is executing. Four cases where concurrent auto precharge occurs are
defined below.
READ with Auto Precharge
1. Interrupted by a READ (with or without auto precharge): A READ to bank m will inter-
rupt a READ on bank n, 2 or 3 clocks later, depending on CAS latency. The precharge
to bank n will begin when the READ to bank m is registered (Figure 27).
2. Interrupted by a WRITE (with or without auto precharge): When a WRITE to bank m
registers, a READ on bank n will be interrupted. DQM should be used 2 clocks prior to
the WRITE command to prevent bus contention. The precharge to bank n will begin
when the WRITE to bank m is registered (Figure 28).
Figure 27:
READ With Auto Precharge Interrupted by a READ
Notes:
1. DQM is LOW.
Figure 28:
READ With Auto Precharge Interrupted by a WRITE
Notes:
1. DQM is HIGH at T2 to prevent DOUT-a+1 from contending with DIN-d at T4.
CLK
DQ
DOUT
a
T2
T1
T4
T3
T6
T5
T0
COMMAND
READ - AP
BANK n
NOP
DOUT
a + 1
DOUT
d
DOUT
d + 1
NOP
T7
BANK n
CL = 3 (BANK m)
BANK m
ADDRESS
Idle
NOP
BANK n,
COL a
BANK m,
COL d
READ - AP
BANK m
Internal
States
t
Page Active
READ with Burst of 4
Interrupt Burst, Precharge
Page Active
READ with Burst of 4
Precharge
RP - BANK n
tRP - BANK m
CAS Latency = 3 (BANK n)
DON’T CARE
CLK
DQ
DOUT
a
T2
T1
T4
T3
T6
T5
T0
COMMAND
NOP
DIN
d + 1
DIN
d
DIN
d + 2
DIN
d + 3
NOP
T7
BANK n
BANK m
ADDRESS
Idle
NOP
DQM
BANK n,
COL a
BANK m,
COL d
WRITE - AP
BANK m
Internal
States
t
Page
Active
READ with Burst of 4
Interrupt Burst, Precharge
Page Active
WRITE with Burst of 4
Write-Back
RP - BANK n
t WR - BANK m
CL = 3 (BANK
n)
READ - AP
BANK n
1
DON’T CARE
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