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| 型號： | MT48H8M16LFB4-8IT:JTR |
| 元件分類： | DRAM |
| 英文描述： | 8M X 16 SYNCHRONOUS DRAM, 6 ns, PBGA54 |
| 封裝： | 8 X 8 MM, LEAD FREE, VFBGA-54 |
| 文件頁數(shù)： | 29/61頁 |
| 文件大?。?/td> | 2469K |
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PDF: 09005aef8237e877/Source: 09005aef8237e8d8
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mb_x16 Mobile SDRAM_Y25M_2.fm - Rev. A 6/06 EN
35
2006 Micron Technology, Inc. All rights reserved.
128Mb: x16 Mobile SDRAM
Power-Down
Preliminary
Notes:
1. This table applies when CKEn-1 was HIGH and CKEn is HIGH (see Truth Table 2) and after
tXSR has been met (if the previous state was self refresh).
2. This table is bank-specific, except where noted; i.e., the current state is for a specific bank
and the commands shown are those allowed to be issued to that bank when in that state.
Exceptions are covered in the notes below.
3. Current state definitions:
Idle:
The bank has been precharged, and tRP has been met.
Row Active: A row in the bank has been activated, and tRCD has been met. No data
bursts/accesses and no register accesses are in progress.
Read:
A READ burst has been initiated, with auto precharge disabled, and has not
yet terminated or been terminated.
Write:
A WRITE burst has been initiated, with auto precharge disabled, and has not
yet terminated or been terminated.
4. The following states must not be interrupted by a command issued to the same bank. COM-
MAND INHIBIT or NOP commands, or allowable commands to the other bank should be
issued on any clock edge occurring during these states. Allowable commands to the other
bank are determined by its current state and Truth Table 3, and according to Truth Table 4.
Precharging: Starts with registration of a PRECHARGE command and ends when tRP is met.
Once tRP is met, the bank will be in the idle state.
Row Activating: Starts with registration of an ACTIVE command and ends when tRCD is
met. Once tRCD is met, the bank will be in the row active state.
Read w/Auto Precharge Enabled: Starts with registration of a READ command with auto
precharge enabled and ends when tRP has been met. Once tRP is met, the
bank will be in the idle state.
Write w/Auto Precharge Enabled: Starts with registration of a WRITE command with auto
precharge enabled and ends when tRP has been met. Once tRP is met, the
bank will be in the idle state.
5. The following states must not be interrupted by any executable command; COMMAND
INHIBIT or NOP commands must be applied on each positive clock edge during these states.
Refreshing: Starts with registration of an AUTO REFRESH command and ends when tRC is
met. Once tRC is met, the SDRAM will be in the all banks idle state.
Accessing Mode Register: Starts with registration of a LOAD MODE REGISTER command
and ends when tMRD has been met. Once tMRD is met, the SDRAM will be in
the all banks idle state.
Table 8:
Truth Table 3 – Current State BanK n, Command to Bank n
Notes: 1-6; notes appear below table.
Current State
CS#
RAS#
CAS#
WE#
Command (Action)
Notes
Any
H
XXX
COMMAND INHIBIT (NOP/Continue previous operation)
L
HHH
NO OPERATION (NOP/Continue previous operation)
Idle
L
H
ACTIVE (Select and activate row)
LLL
H
AUTO REFRESH
LLL
L
LOAD MODE REGISTER
LL
H
L
PRECHARGE
Row Active
LH
READ (Select column and start READ burst)
LH
L
WRITE (Select column and start WRITE burst)
LL
H
L
PRECHARGE (Deactivate row in bank or banks)
Read (Auto
Precharge
Disabled)
LH
READ (Select column and start new READ burst)
LH
L
WRITE (Select column and start WRITE burst)
LL
H
L
PRECHARGE (Truncate READ burst, start PRECHARGE)
LH
HL
BURST TERMINATE
Write (Auto
Precharge
Disabled)
LH
READ (Select column and start READ burst)
LH
L
WRITE (Select column and start new WRITE burst)
LL
H
L
PRECHARGE (Truncate WRITE burst, start PRECHARGE)
LH
HL
BURST TERMINATE
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| MT48H8M16LFF3-7E | 制造商:Micron Technology Inc 功能描述: |
| MT48H8M16LFF4-10 | 功能描述:IC SDRAM 128MBIT 100MHZ 54VFBGA RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:1 系列:- 格式 - 存儲器:RAM 存儲器類型:SDRAM 存儲容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869 |
| MT48H8M16LFF4-10 IT | 功能描述:IC SDRAM 128MBIT 100MHZ 54VFBGA RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:1 系列:- 格式 - 存儲器:RAM 存儲器類型:SDRAM 存儲容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869 |
| MT48H8M16LFF4-8 | 功能描述:IC SDRAM 128MBIT 125MHZ 54VFBGA RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:1 系列:- 格式 - 存儲器:RAM 存儲器類型:SDRAM 存儲容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869 |
| MT48H8M16LFF4-8 IT | 功能描述:IC SDRAM 128MBIT 125MHZ 54VFBGA RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:1 系列:- 格式 - 存儲器:RAM 存儲器類型:SDRAM 存儲容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869 |
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