參數(shù)資料
型號(hào): MSM548333
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: 240,384-Word×8-bit + 240,384-Word×4-bit Triple Port type Field Memory(雙存儲(chǔ)塊分別為240,384字×8位和240,384字×4位三口型場(chǎng)存儲(chǔ)器)
中文描述: 240384 -字× 8位240384 -字× 4位的三場(chǎng)端口類型內(nèi)存(雙存儲(chǔ)塊分別為240384字× 8位和240384字× 4位三口型場(chǎng)存儲(chǔ)器)
文件頁數(shù): 29/42頁
文件大?。?/td> 421K
代理商: MSM548333
Semiconductor
MSM548333
29/42
RCLK
t
RCLK
L CYCLE
(L-1)CYCLE
(L-2)CYCLE
(L+2) CYCLE
(L+1) CYCLE
Low
RADE1/RX
\
\
RR1/TR
t
REH1
t
REDS1
t
REDH1
t
RES1
Valid
D(L+1)
High-Z
t
AC1
\
\
\
\
RXINC1
\
\
RE1/RY
\
\
DOY1/0 - 7
\
\
RADE2/RX
\
\
RR2/TR
\
\
RXINC2
\
\
RCLKY2
\
\
REY2/RY
\
\
DOY2/0 - 7
\
\
RCLKC2
\
\
REC2/RY
\
\
DOC2/0 - 3
\
\
DOC1/0 - 3
Low
Low
Valid
D(L+2)
Valid
D(L-1)
Valid
D(L)
Valid
D(L-3)
Valid
D(L-2)
t
OHZ1
t
OH1
t
OHY2
Low
Low
Low
t
RCLKY
M CYCLE
(M-1)CYCLE
(M-2)CYCLE
(M+2) CYCLE
(M+1) CYCLE
t
REDSY2
t
REDHY2
Valid
D(M+1)
High-Z
t
ACY2
Valid
D(M+2)
Valid
D(M-1)
Valid
D(M)
Valid
D(M-3)
Valid
D(M-2)
t
OHZY2
t
REHY2
t
RESY2
t
OHC2
t
RCLKC
N CYCLE
(N-1)CYCLE
(N-2)CYCLE
(N+2) CYCLE
(N+1) CYCLE
t
REDSC2
t
REDHC2
Valid
D(N+1)
High-Z
t
ACC2
Valid
D(N+2)
Valid
D(N-1)
Valid
D(N)
Valid
D(N-3)
Valid
D(N-2)
t
OHZC2
t
REHC2
t
RESC2
Read Cycle (RE Control)
Note :In the cycle in which RE1/RY = "L", REY2/RY = "L", or REC2/RY = "L", the read address
pointer is not incremented and the output enters the high impedance state.
The signals RE1/RY, REY2/RY, and REC2/RY can be operated independently.
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