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參數(shù)資料
| 型號： | MSM548333 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 240,384-Word×8-bit + 240,384-Word×4-bit Triple Port type Field Memory(雙存儲塊分別為240,384字×8位和240,384字×4位三口型場存儲器) |
| 中文描述： | 240384 -字× 8位240384 -字× 4位的三場端口類型內(nèi)存（雙存儲塊分別為240384字× 8位和240384字× 4位三口型場存儲器） |
| 文件頁數(shù)： | 15/42頁 |
| 文件大小： | 421K |
| 代理商： | MSM548333 |
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Semiconductor
MSM548333
15/42
Power ON
Power must be applied to RCLK, RCLKY2, RCLKC2, RE1/RY, REY2/RY, REC2/RY and WE/WY
input signals to pull them "Low" before or when the V
CC
supply is turned on.
After power-up, the device is designed to begin proper operation in at least 200
m
s after V
CC
has
reached the specified voltage. After 200
m
s, a minimum of one line dummy write operation and read
operation is required according to the address setting mode, because the read and write address
pointers are not valid after power-up.
New Data Read Access
In order to read out "new data', the delay between the beginning of a write address setting cycle and
read address setting cycle must be at least two lines.
Old Data Read Access
In order to read out "old data", the delay between the beginning of a write address setting cycle and
read address setting cycle must be more than 0 but less than a half line.
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