參數(shù)資料
型號: MSM548333
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: 240,384-Word×8-bit + 240,384-Word×4-bit Triple Port type Field Memory(雙存儲塊分別為240,384字×8位和240,384字×4位三口型場存儲器)
中文描述: 240384 -字× 8位240384 -字× 4位的三場端口類型內(nèi)存(雙存儲塊分別為240384字× 8位和240384字× 4位三口型場存儲器)
文件頁數(shù): 1/42頁
文件大小: 421K
代理商: MSM548333
Semiconductor
MSM548333
1/42
240,384-Word
8-bit + 240,384-Word
4-bit Triple Port type Field Memory
DESCRIPTION
The MSM548333 is a high performance double triple-port type 2.88-Mbit, 768 bits
313 lines
(8 +
4), Field Memory for Y-C separation signal control. The MSM548333 has two memory plain blocks:
Y area has 8 plains and C area has 4 plains. Each plain contains 768
313 bits. Each plain has one input
port and two output ports. Access is done line by line. The line address must be set each time a line
is changed.
The MSM548333 is especially designed for high performance digital cameras, TVs, VTRs and Multi-
media applications which require special operations such as time-base correction, noise reduction
and other digital techniques.
The MSM548333 is not designed for high end use in such applications as medical systems,
professional graphics systems which require long term picture storage, data storage systems and
others.
More than two MSM548333s can be cascaded directly without any delay devices between them.
Cascading MSM548333s provides larger capacity and longer delay.
X and Y serial address input enables random initial address setting of serial access in a page. Other
than the random address setting, MSM548333 has several types of address set modes such as line
hold, address jump to initial address and line increment. For example, address jump to initial X
address and line increment enable block access.
Self refresh function releases the MSM548333 from being applied external refresh control clocks even
though it contains dynamic type memory cells. Input enable control or IE pin enables write mask
function.
FEATURES
Configuration
6-port configuration
Y area: 768
313
8-bit configuration
1 (serial write port)
768
313
8-bit configuration
2 (serial read port)
C area: 768
313
4-bit configuration
1 (serial write port)
768
313
4-bit configuration
2 (serial read port)
Line by line access.
X and Y serial address inputs for random serial initial bit address
Asynchronous operation
Serial read and write cycle times
Read cycle: 30 ns min.
Write cycle: 50 ns min.
Low operating supply voltage: 3.3 V
±
0.3 V
Self-refresh.
Various address reset mode for picture processing
Write mask by IE.
Package:
100-pin plastic TQFP
(TQFP100-P-1414-0.50-K)
(Product : MSM548333TS-K)
This version: Jan. 1998
Previous version: Dec. 1996
E2L0035-17-Y1
相關(guān)PDF資料
PDF描述
MSM54V24616 Dual 128K×16 Dynamic RAM(2組128K×16動態(tài)RAM)
MSM56V16160DH 2-Bank 512K×16 Synchronous Dynamic RAM(2組512K×16動態(tài)RAM)
MSM56V16160D 2-Bank x 524,288-Word x 16-Bit SYNCHRONOUS DYNAMIC RAM
MSM56V16160F 2-Bank x 524,288 Word x 16 Bit SYNCHRONOUS DYNAMIC RAM
MSM56V16800E 2-Bank x 1,048,576-Word x 8-Bit SYNCHRONOUS DYNAMIC RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MSM54V12222A-30TS-K 制造商:OKI Semiconductor 功能描述:FIELD/FRAME/LINE MEMORY, 44 Pin, Plastic, TSOP
MSM54V12222B-25JDR17 制造商:ROHM Semiconductor 功能描述:
MSM54V12222B-25JSDR1 制造商:ROHM Semiconductor 功能描述:
MSM54V12222B-25T3-K7 制造商:ROHM Semiconductor 功能描述:
MSM54V12222B-25T3R17 制造商:ROHM Semiconductor 功能描述: