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| 型號： | MPC509 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Highly Integrated, Low-Power, 32-Bit Microcontroller |
| 中文描述： | 32-BIT, RISC MICROCONTROLLER, PQFP16 |
| 文件頁數(shù)： | 148/300頁 |
| 文件大小： | 3744K |
| 代理商： | MPC509 |
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MOTOROLA
5-54
SYSTEM INTERFACE UNIT
Rev. 15 June 98
MPC509
USER’S MANUAL
5.5.13.2 Turn-Off Times for Different Interface Types
The turn-off time for asynchronous devices is equal to the time for OE to negate plus
the time for device’s outputs to go to a high-impedance state. For devices with an
0101
Region with fixed burst access capability (burst type 1) and asynchronous OE.
Refer to
Figure 5-23
and
Figure 5-24
. A device of this type is pipelineable and
can hold off its internal data until OE is asserted. The interface keeps the first data
beat valid until the BDIP signal indicates that it should send out the next data.
This interface type can function as an asynchronous interface. That is, a device
with this ITYPE can be assigned to the CSBOOT region, which comes out of reset
configured as an asynchronous region with seven wait states. In this case, the
MCU doesn’t latch the data to be read until the assigned number of wait states
have elapsed and OE is asserted.
Reserved.
Region with fixed burst access capability (burst type 1) and synchronous OE. Re-
fer to
Figure 5-23
(but with a synchronous, not asynchronous, OE) and to
Figure
5-24
. Devices with this type of interface are pipelineable and can hold off internal
data until OE is asserted. The interface keeps the first data beat valid until the
BDIP signal indicates that it should send out the next data.
This interface type can function as an asynchronous interface. That is, a device
with this ITYPE can be assigned to the CSBOOT region, which comes out of reset
configured as an asynchronous region with seven wait states. In this case, the
MCU doesn’t latch the data to be read until the assigned number of wait states
have elapsed and OE is asserted.
Region with fixed burst access capability (burst type 2). Refer to
Figure 5-25
.
This interface type uses the LAST timing protocol. Typically, this ITYPE is used
for burst accesses to DRAM.
This interface type may have an OE and may have a wait state counter, but the
chip-select logic does not expect the device to have either and will never assert
the OE signal. (OE can be provided by external logic if required, or a different
ITYPE can be selected.) The device will drive out the data after the number of wait
states it requires. The interface keeps the first data beat valid for only one clock.
Any access to a device with this type of interface must be made using chip se-
lects, and the ACKEN bit in the option register for the chip select must be set.
Because this type cannot hold off its internal data until the data bus is available,
an access to a region of this type cannot be pipelined with a previous access to
the same or a different region. (That is, the address of an access to this region
cannot appear on the external bus before the data for the previous access.) The
address for the second access can overlap the data for the first access, however.
In addition, if an access to this region is followed by an access to a pipelineable
region, the second access is pipelined.
This interface type can function as an asynchronous interface. That is, a device
with this ITYPE can be assigned to the CSBOOT region, which comes out of reset
configured as an asynchronous region with seven wait states. In this case, the
MCU doesn’t latch the data to be read until the assigned number of wait states
have elapsed and OE is asserted.
Synchronous region (no burst) with synchronous OE, as with ITYPE 3, but with
early overlapping of accesses to the region. Refer to
Figure 5-21
. This type of in-
terface must be able to pipeline another access to it one clock cycle before it
drives valid data out on a read or receives data on a write for the previous access.
Reserved.
0110
0111
1000
1001
1010–1111
Table 5-27 Interface Types (Continued)
ITYPE
(Binary)
Interface Type
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| MPC5200ID | MPC5200 Hardware Specifications |
| MPC555 | Highly Integrated, Low-Power, 32-Bit Microcontroller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC509A | 制造商:BB 制造商全稱:BB 功能描述:Single-Ended 8-Channel/Differential 4-Channel CMOS ANALOG MULTIPLEXERS |
| MPC509AP | 功能描述:多路器開關(guān) IC 4-Ch Diff-Input Analog Mult RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻（最大值）:7 Ohms 開啟時(shí)間（最大值）: 關(guān)閉時(shí)間（最大值）: 傳播延遲時(shí)間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16 |
| MPC509AP | 制造商:BURR-BROWN 功能描述:IC MUX 4CH DP DIP28 509 制造商:Texas Instruments 功能描述:Multiplexer IC Multiplexer Type:Differen |
| MPC509APG4 | 功能描述:多路器開關(guān) IC 4Ch Diff-Input Ana Multiplexer RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻（最大值）:7 Ohms 開啟時(shí)間（最大值）: 關(guān)閉時(shí)間（最大值）: 傳播延遲時(shí)間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16 |
| MPC509AU | 功能描述:多路器開關(guān) IC 4-Ch Diff-Input Analog Mult RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻（最大值）:7 Ohms 開啟時(shí)間（最大值）: 關(guān)閉時(shí)間（最大值）: 傳播延遲時(shí)間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16 |
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