參數(shù)資料
型號(hào)： MCIMX537CVV8C
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 800 MHz, RISC PROCESSOR, PBGA529
封裝： 19 X 19 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, TEPBGA-529
文件頁數(shù)： 7/172頁
文件大小： 4562K
代理商： MCIMX537CVV8C
i.MX53 Applications Processors for Industrial Products, Rev. 3
104
Freescale Semiconductor
Electrical Characteristics
Table 64. Asynchronous Parallel Interface Timing Parameters (Access Level)
ID
Parameter
Symbol
Min
Typ1
1The exact conditions have not been finalized, but will likely match the current customer requirement for their specific display.
These conditions may be chip specific.
Max
Unit
IP28 Write system cycle time
Tcycw
Tdicpw – 1.24
Tdicpw2
2Display period value for write
ACCESS_SIZE is predefined in REGISTER.
Tdicpw+1.24
ns
IP29 RS start
Tdcsrr
Tdicurs – 1.24
Tdicurs
Tdicurs+1.24
ns
IP30 CS start
Tdcsc
Tdicucs – 1.24
Tdicur
Tdicucs+1.24
ns
IP31 CS hold
Tdchc
Tdicdcs – Tdicucs – 1.2
4
Tdicdcs3–Tdicucs4
3Display control down for CS
DISP_DOWN is predefined in REGISTER.
4Display control up for CS
DISP_UP is predefined in REGISTER.
Tdicdcs – Tdicucs+1.24
ns
IP32 RS hold
Tdchrr
Tdicdrs – Tdicurs – 1.24 Tdicdrs5–Tdicurs6
5Display control down for RS
DISP_DOWN is predefined in REGISTER.
6Display control up for RS
DISP_UP is predefined in REGISTER.
Tdicdrs – Tdicurs+1.24
ns
IP35 Controls setup time for
write
Tdcsw
Tdicuw – 1.24
Tdicuw
Tdicuw+1.24
ns
IP36 Controls hold time for
write
Tdchw
Tdicdw – Tdicuw – 1.24
Tdicpw7–Tdicuw8
Tdicdw–Tdicuw+1.24
ns
IP38 Slave device data hold
time8
Troh
Tdrp–Tlbd–Tdicdr+1.
24
—
Tdicpr – Tdicdr – 1.24
ns
Tdicpw
T
DI_CLK
ceil
×
DI_ACCESS_SIZE_#
DI_CLK_PERIOD
-----------------------------------------------------
=
Tdicdcs
1
2
---T
DI_CLK
ceil
×
2
DISP_DOWN_#
×
DI_CLK_PERIOD
--------------------------------------------------
=
Tdicucs
1
2
---T
DI_CLK
ceil
×
2
DISP_UP_#
×
DI_CLK_PERIOD
----------------------------------------------
=
Tdicdrs
1
2
---T
DI_CLK
ceil
×
2
DISP_DOWN_#
×
DI_CLK_PERIOD
--------------------------------------------------
=
Tdicurs
1
2
---T
DI_CLK
ceil
×
2DISP_UP_#
×
DI_CLK_PERIOD
----------------------------------------------
=
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCIMX537CVV8C 制造商:Freescale Semiconductor 功能描述:IC 32-BIT MPU 800 MHZ 529-BGA
MCIMX537CVV8CR2 功能描述:處理器 - 專門應(yīng)用 iMX53 Rev 2.1 Indust RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX538DZK1C 功能描述:處理器 - 專門應(yīng)用 I.MX53 2.1 POP RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX53EVK 制造商:Freescale Semiconductor 功能描述:
MCIMX53-LVDS 制造商:Freescale Semiconductor 功能描述:I.MX53 XGA DISPLAY LVDS DEV BOARD 制造商:Freescale Semiconductor 功能描述:I.MX53, XGA DISPLAY, LVDS, DEV BOARD 制造商:Freescale Semiconductor 功能描述:I.MX53, XGA DISPLAY, LVDS CONNECTOR, DEV BOARD; Silicon Manufacturer:Freescale; Core Architecture:ARM; Core Sub-Architecture:Cortex-A8; Silicon Core Number:i.MX5; Silicon Family Name:i.MX53
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