參數(shù)資料
型號： MCIMX537CVV8C
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 800 MHz, RISC PROCESSOR, PBGA529
封裝： 19 X 19 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, TEPBGA-529
文件頁數(shù)： 37/172頁
文件大小： 4562K
代理商： MCIMX537CVV8C
Electrical Characteristics
i.MX53 Applications Processors for Industrial Products, Rev. 3
Freescale Semiconductor
131
NOTE
All the timings for the SSI are given for a non-inverted serial clock
polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have
been inverted, all the timing remains valid by inverting the clock signal
STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables
and in the figures.
All timings are on Audiomux Pads when SSI is being used for data
transfer.
“Tx” and “Rx” refer to the Transmit and Receive sections of the SSI.
The terms WL and BL refer to Word Length (WL) and Bit Length (BL).
For internal Frame Sync operation using external clock, the FS timing is
same as that of Tx Data (for example, during AC97 mode of operation).
4.7.17
UART I/O Configuration and Timing Parameters
4.7.17.1
UART RS-232 I/O Configuration in Different Modes
The i.MX53 UART interfaces can serve both as DTE or DCE device. This can be configured by the
DCEDTE control bit (default 0 – DCE mode). Table 86 shows the UART I/O configuration based on the
enabled mode.
4.7.17.2
UART RS-232 Serial Mode Timing
The following sections describe the electrical information of the UART module in the RS-232 mode.
4.7.17.2.1
UART Transmitter
Figure 85 depicts the transmit timing of UART in the RS-232 serial mode, with 8 data bit/1 stop bit format.
Table 87 lists the UART RS-232 serial mode transmit timing characteristics.
Table 86. UART I/O Configuration vs. Mode
Port
DTE Mode
DCE Mode
Direction
Description
Direction
Description
RTS
Output
RTS from DTE to DCE
Input
RTS from DTE to DCE
CTS
Input
CTS from DCE to DTE
Output
CTS from DCE to DTE
DTR
Output
DTR from DTE to DCE
Input
DTR from DTE to DCE
DSR
Input
DSR from DCE to DTE
Output
DSR from DCE to DTE
DCD
Input
DCD from DCE to DTE
Output
DCD from DCE to DTE
RI
Input
RING from DCE to DTE
Output
RING from DCE to DTE
TXD_MUX
Input
Serial data from DCE to DTE
Output
Serial data from DCE to DTE
RXD_MUX
Output
Serial data from DTE to DCE
Input
Serial data from DTE to DCE
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCIMX537CVV8C 制造商:Freescale Semiconductor 功能描述:IC 32-BIT MPU 800 MHZ 529-BGA
MCIMX537CVV8CR2 功能描述:處理器 - 專門應(yīng)用 iMX53 Rev 2.1 Indust RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX538DZK1C 功能描述:處理器 - 專門應(yīng)用 I.MX53 2.1 POP RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX53EVK 制造商:Freescale Semiconductor 功能描述:
MCIMX53-LVDS 制造商:Freescale Semiconductor 功能描述:I.MX53 XGA DISPLAY LVDS DEV BOARD 制造商:Freescale Semiconductor 功能描述:I.MX53, XGA DISPLAY, LVDS, DEV BOARD 制造商:Freescale Semiconductor 功能描述:I.MX53, XGA DISPLAY, LVDS CONNECTOR, DEV BOARD; Silicon Manufacturer:Freescale; Core Architecture:ARM; Core Sub-Architecture:Cortex-A8; Silicon Core Number:i.MX5; Silicon Family Name:i.MX53
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