參數(shù)資料
型號： MCIMX537CVV8C
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 800 MHz, RISC PROCESSOR, PBGA529
封裝： 19 X 19 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, TEPBGA-529
文件頁數(shù)： 108/172頁
文件大?。?/td> 4562K
代理商： MCIMX537CVV8C
i.MX53 Applications Processors for Industrial Products, Rev. 3
40
Freescale Semiconductor
Electrical Characteristics
Table 23 shows the AC parameters for LPDDR2 I/O operating in LPDDR2 mode.
Table 24 shows the AC parameters for LPDDR2 I/O operating in DDR3 mode.
2 Vid(ac) specifies the input differential voltage |Vtr – Vcp| required for switching, where Vtr is the “true” input signal and Vcp is
the “complementary” input signal. The Minimum value is equal to Vih(ac) – Vil(ac).
3 The typical value of Vix(ac) is expected to be about 0.5 * OVDD. and Vix(ac) is expected to track variation of OVDD. Vix(ac)
indicates the voltage at which differential input signal must cross.
4 The typical value of Vox(ac) is expected to be about 0.5 * OVDD and Vox(ac) is expected to track variation in OVDD. Vox(ac)
indicates the voltage at which differential output signal must cross.
Table 23. LPDDR2 I/O LPDDR2 mode AC Characteristics1
1 Note that the JEDEC LPDDR2 specification (JESD209_2B) supersedes any specification in this document.
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
AC input logic high
Vih(ac)
—
Vref + 0.22
—
OVDD
V
AC input logic low
Vil(ac)
—
0
—
Vref – 0.22
V
AC differential input high voltage2
2 Vid(ac) specifies the input differential voltage |Vtr – Vcp| required for switching, where Vtr is the “true” input signal and Vcp is
the “complementary” input signal. The Minimum value is equal to Vih(ac) – Vil(ac).
Vidh(ac)
—
0.44
—
V
AC differential input low voltage
Vidl(ac)
—
0.44
V
Input AC differential cross point voltage3
3 The typical value of Vix(ac) is expected to be about 0.5 * OVDD. and Vix(ac) is expected to track variation of OVDD. Vix(ac)
indicates the voltage at which differential input signal must cross.
Vix(ac)
Relative to OVDD/2
-0.12
—
0.12
V
Over/undershoot peak
Vpeak
—
0.35
V
Over/undershoot area (above OVDD
or below OVSS)
Varea
266MHz
—
0.6
V*ns
Single output slew rate
tsr
50Ohm to Vref.
5pF load.
Drive impedance=
40Ohm +-30%
1.5
—
3.5
V/ns
50Ohm to Vref.
5pF load.Drive
impedance= 60Ohm
+-30%
1—
2.5
Skew between pad rise/fall asymmetry +
skew caused by SSN
tSKD
clk=266MHz
clk=400MHz
——
0.2
0.1
ns
Table 24. LPDDR2 I/O DDR3 mode AC Characteristics1
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
AC input logic high
Vih(ac)
—
Vref + 0.175
—
OVDD
V
AC input logic low
Vil(ac)
—
0
—
Vref – 0.175
V
AC differential input voltage2
Vid(ac)
—
0.35
—
V
Input AC differential cross point voltage3
Vix(ac)
—
Vref – 0.15
—
Vref + 0.15
V
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相關代理商/技術參數(shù)
參數(shù)描述
MCIMX537CVV8C 制造商:Freescale Semiconductor 功能描述:IC 32-BIT MPU 800 MHZ 529-BGA
MCIMX537CVV8CR2 功能描述:處理器 - 專門應用 iMX53 Rev 2.1 Indust RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX538DZK1C 功能描述:處理器 - 專門應用 I.MX53 2.1 POP RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX53EVK 制造商:Freescale Semiconductor 功能描述:
MCIMX53-LVDS 制造商:Freescale Semiconductor 功能描述:I.MX53 XGA DISPLAY LVDS DEV BOARD 制造商:Freescale Semiconductor 功能描述:I.MX53, XGA DISPLAY, LVDS, DEV BOARD 制造商:Freescale Semiconductor 功能描述:I.MX53, XGA DISPLAY, LVDS CONNECTOR, DEV BOARD; Silicon Manufacturer:Freescale; Core Architecture:ARM; Core Sub-Architecture:Cortex-A8; Silicon Core Number:i.MX5; Silicon Family Name:i.MX53
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