參數(shù)資料
型號(hào)： MCIMX537CVV8C
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 800 MHz, RISC PROCESSOR, PBGA529
封裝： 19 X 19 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, TEPBGA-529
文件頁數(shù)： 53/172頁
文件大?。?/td> 4562K
代理商： MCIMX537CVV8C
i.MX53 Applications Processors for Industrial Products, Rev. 3
146
Freescale Semiconductor
Boot Mode Configuration
5.2
Boot Devices Interfaces Allocation
Table 109 lists the interfaces that can be used by the boot process in accordance with the specific boot
mode configuration. The table also describes the interface’s specific modes and IOMUXC allocation,
which are configured during boot when appropriate.
EIM_A22
Input
BOOT_CFG1[7]/Test Mode Selection
Boot Options, Pin value overrides fuse
settings for BT_FUSE_SEL = ‘0’.
Signal Configuration as Fuse Override
Input at Power Up. These are special I/O
lines that control the boot up configuration
during product development. In production,
the boot configuration can be controlled by
fuses.
EIM_A21
Input
BOOT_CFG1[6]/Test Mode Selection
EIM_A20
Input
BOOT_CFG1[5]/Test Mode Selection
EIM_A19
Input
BOOT_CFG1[4]
EIM_A18
Input
BOOT_CFG1[3]
EIM_A17
Input
BOOT_CFG1[2]
EIM_A16
Input
BOOT_CFG1[1]
EIM_LBA
Input
BOOT_CFG1[0]
EIM_EB0
Input
BOOT_CFG2[7]
EIM_EB1
Input
BOOT_CFG2[6]
EIM_DA0
Input
BOOT_CFG2[5]
EIM_DA1
Input
BOOT_CFG2[4]
EIM_DA2
Input
BOOT_CFG2[3]
EIM_DA3
Input
BOOT_CFG2[2]
EIM_DA4
Input
BOOT_CFG3[7]
EIM_DA5
Input
BOOT_CFG3[6]
EIM_DA6
Input
BOOT_CFG3[5]
EIM_DA7
Input
BOOT_CFG3[4]
EIM_DA8
Input
BOOT_CFG3[3]
EIM_DA9
Input
BOOT_CFG3[2]
EIM_DA10
Input
BOOT_CFG3[1]
Table 109. Interfaces Allocation During Boot
Interface
IP Instance
Allocated Pads During Boot
Comment
SPI
CSPI
EIM_A25, EIM_D21, EIM_D22, EIM_D28
Only SS1 is supported
SPI
ECSPI-1
EIM_D[19:16]
Only SS1 is supported
SPI
ECSPI-2
CSI_DAT[10:8], EIM_LBA
Only SS1 is supported
Table 108. Fuses and Associated Pins Used for Boot (continued)
Pin
Direction at
Reset
E-Fuse Name
Details
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCIMX537CVV8C 制造商:Freescale Semiconductor 功能描述:IC 32-BIT MPU 800 MHZ 529-BGA
MCIMX537CVV8CR2 功能描述:處理器 - 專門應(yīng)用 iMX53 Rev 2.1 Indust RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX538DZK1C 功能描述:處理器 - 專門應(yīng)用 I.MX53 2.1 POP RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX53EVK 制造商:Freescale Semiconductor 功能描述:
MCIMX53-LVDS 制造商:Freescale Semiconductor 功能描述:I.MX53 XGA DISPLAY LVDS DEV BOARD 制造商:Freescale Semiconductor 功能描述:I.MX53, XGA DISPLAY, LVDS, DEV BOARD 制造商:Freescale Semiconductor 功能描述:I.MX53, XGA DISPLAY, LVDS CONNECTOR, DEV BOARD; Silicon Manufacturer:Freescale; Core Architecture:ARM; Core Sub-Architecture:Cortex-A8; Silicon Core Number:i.MX5; Silicon Family Name:i.MX53
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