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參數(shù)資料
| 型號： | MCIMX537CVV8C |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 800 MHz, RISC PROCESSOR, PBGA529 |
| 封裝： | 19 X 19 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, TEPBGA-529 |
| 文件頁數(shù)： | 140/172頁 |
| 文件大?。?/td> | 4562K |
| 代理商： | MCIMX537CVV8C |
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Modules List
i.MX53 Applications Processors for Industrial Products, Rev. 3
Freescale Semiconductor
7
CCM
GPC
SRC
Clock Control
Module
Global Power
Controller
System Reset
Controller
Clocks,
Resets, and
Power Control
These modules are responsible for clock and reset distribution in the
system, as well as for system power management.
The system includes four PLLs.
CSPI
ECSPI-1
ECSPI-2
Configurable
SPI, Enhanced
CSPI
Connectivity
Peripherals
Full-duplex enhanced synchronous serial interface, with data rates
16-60 Mbit/s. It is configurable to support master/slave modes. In Master
mode it supports four slave selects for multiple peripherals.
CSU
Central Security
Unit
Security
The central security unit (CSU) is responsible for setting comprehensive
security policy within the i.MX53 platform, and for sharing security
information between the various security modules. The security control
registers (SCR) of the CSU are set during boot time by the high assurance
boot (HAB) code and are locked to prevent further writing.
DEBUG
Debug System
System
Control
The debug system provides real-time trace debug capability of both
instructions and data. It supports a trace protocol that is an integral part of
the ARM Real Time Debug solution (RealView).
Real-time tracing is controlled by specifying a set of triggering and filtering
resources, which include address and data comparators, three
cross-system triggers (CTI), counters, and sequencers.
debug access port (DAP) —The DAP provides real-time access for the
debugger without halting the core to system memory, peripheral register,
debug configuration registers and JTAG scan chains.
EXTMC
External Memory
Controller
Connectivity
Peripherals
The EXTMC is an external and internal memory interface. It performs
arbitration between multi-AXI masters to multi-memory controllers, divided
into four major channels, fast memories (DDR2/DDR3/LPDDR2) channel,
slow memories (NOR-FLASH / PSRAM / NAND-FLASH etc.) channel,
internal memory (RAM, ROM) channel and graphical memory (GMEM)
channel.
In order to increase the bandwidth performance, the EXTMC separates the
buffering and the arbitration between different channels so parallel
accesses can occur. By separating the channels, slow accesses do not
interfere with fast accesses.
EXTMC Features:
64-bit and 32-bit AXI ports
Enhanced arbitration scheme for fast channel, including dynamic master
priority, and taking into account which pages are open or closed and
what type (read or write) was the last access
Flexible bank interleaving
Support 16/32-bit DDR2-800 or DDR3-800 or LPDDR2.
Support up to 2 GByte DDR memories.
Support NFC, EIM signal muxing scheme.
Support 8/16/32-bit Nor-Flash/PSRAM memories (sync and async
operating modes), at slow frequency. (8-bit is not supported on
D[23]-D[16]).
Support 4/8/14/16-bit ECC, page sizes of 512-B, 2-KB and 4-KB
Nand-Flash (including MLC)
Multiple chip selects (up to 4).
Enhanced DDR memory controller, supporting access latency hiding
Support watermark for security (internal and external memories)
Table 2. i.MX53 Digital and Analog Blocks (continued)
Block
Mnemonic
Block Name
Subsystem
Brief Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCM16Y1BACFT16 | 16-BIT, MROM, MICROCONTROLLER, PQFP160 |
| MCM16Y1BGCFT16 | 16-BIT, MROM, MICROCONTROLLER, PQFP160 |
| M68HC16Y1CFC | 16-BIT, MROM, MICROCONTROLLER, PQFP16 |
| MCV14AI/SL | 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO14 |
| MCV14ATI/SL | 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO14 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCIMX537CVV8C | 制造商:Freescale Semiconductor 功能描述:IC 32-BIT MPU 800 MHZ 529-BGA |
| MCIMX537CVV8CR2 | 功能描述:處理器 - 專門應(yīng)用 iMX53 Rev 2.1 Indust RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MCIMX538DZK1C | 功能描述:處理器 - 專門應(yīng)用 I.MX53 2.1 POP RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MCIMX53EVK | 制造商:Freescale Semiconductor 功能描述: |
| MCIMX53-LVDS | 制造商:Freescale Semiconductor 功能描述:I.MX53 XGA DISPLAY LVDS DEV BOARD 制造商:Freescale Semiconductor 功能描述:I.MX53, XGA DISPLAY, LVDS, DEV BOARD 制造商:Freescale Semiconductor 功能描述:I.MX53, XGA DISPLAY, LVDS CONNECTOR, DEV BOARD; Silicon Manufacturer:Freescale; Core Architecture:ARM; Core Sub-Architecture:Cortex-A8; Silicon Core Number:i.MX5; Silicon Family Name:i.MX53 |
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