參數(shù)資料
型號(hào)： MCIMX537CVV8C
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 800 MHz, RISC PROCESSOR, PBGA529
封裝： 19 X 19 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, TEPBGA-529
文件頁數(shù)： 129/172頁
文件大小： 4562K
代理商： MCIMX537CVV8C
i.MX53 Applications Processors for Industrial Products, Rev. 3
6
Freescale Semiconductor
Architectural Overview
2
Architectural Overview
The following subsections provide an architectural overview of the i.MX53 processor system.
2.1
Block Diagram
Figure 1 shows the functional modules in the i.MX53 processor system.
Figure 1. i.MX53 System Block Diagram
NOTE
The numbers in brackets indicate number of module instances. For example,
PWM (2) indicates two separate PWM peripherals.
3
Modules List
The i.MX53 processor contains a variety of digital and analog modules. Table 2 describes these modules
in alphabetical order.
Table 2. i.MX53 Digital and Analog Blocks
Block
Mnemonic
Block Name
Subsystem
Brief Description
ARM
ARM Platform
ARM
The ARM Cortex A8TM Platform consists of the ARM processor version
r2p5 (with TrustZone) and its essential sub-blocks. It contains the 32 Kbyte
L1 instruction cache, 32 Kbyte L1 data cache, Level 2 cache controller and
a 256 Kbyte L2 cache. The platform also contains an event monitor and
debug modules. It also has a NEON coprocessor with SIMD media
processing architecture, a register file with 32/64-bit general-purpose
registers, an integer execute pipeline (ALU, Shift, MAC), dual
single-precision floating point execute pipelines (FADD, FMUL), a
load/store and permute pipeline and a non-pipelined vector floating point
(VFP Lite) coprocessor supporting VFPv3.
ASRC
Asynchronous
Sample Rate
Converter
Multimedia
Peripherals
The asynchronous sample rate converter (ASRC) converts the sampling
rate of a signal associated to an input clock into a signal associated to a
different output clock. The ASRC supports concurrent sample rate
conversion of up to 10 channels of about –120 dB THD+N. The sample rate
conversion of each channel is associated to a pair of incoming and outgoing
sampling rates. The ASRC supports up to three sampling rate pairs.
AUDMUX
Digital Audio
Multiplexer
Multimedia
Peripherals
The AUDMUX is a programmable interconnect for voice, audio, and
synchronous data routing between host serial interfaces (for example,
SSI1, SSI2, and SSI3) and peripheral serial interfaces (audio and voice
codecs). The AUDMUX has seven ports (three internal and four external)
with identical functionality and programming models. A desired connectivity
is achieved by configuring two or more AUDMUX ports.
CAMP-1
CAMP-2
Clock Amplifier
Clocks,
Resets, and
Power Control
Clock amplifier
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCIMX537CVV8C 制造商:Freescale Semiconductor 功能描述:IC 32-BIT MPU 800 MHZ 529-BGA
MCIMX537CVV8CR2 功能描述:處理器 - 專門應(yīng)用 iMX53 Rev 2.1 Indust RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX538DZK1C 功能描述:處理器 - 專門應(yīng)用 I.MX53 2.1 POP RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX53EVK 制造商:Freescale Semiconductor 功能描述:
MCIMX53-LVDS 制造商:Freescale Semiconductor 功能描述:I.MX53 XGA DISPLAY LVDS DEV BOARD 制造商:Freescale Semiconductor 功能描述:I.MX53, XGA DISPLAY, LVDS, DEV BOARD 制造商:Freescale Semiconductor 功能描述:I.MX53, XGA DISPLAY, LVDS CONNECTOR, DEV BOARD; Silicon Manufacturer:Freescale; Core Architecture:ARM; Core Sub-Architecture:Cortex-A8; Silicon Core Number:i.MX5; Silicon Family Name:i.MX53
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