參數(shù)資料
型號: MCC68HC711D3
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, UUC
封裝: DIE
文件頁數(shù): 17/157頁
文件大?。?/td> 2252K
代理商: MCC68HC711D3
Programmable Timer
Computer Operating Properly Watchdog Function
MC68HC711D3 — Rev. 2
Data Sheet
MOTOROLA
Programmable Timer
113
8.6 Computer Operating Properly Watchdog Function
The clocking chain for the COP function, tapped off of the main timer divider chain,
is only superficially related to the main timer system. The CR1 and CR0 bits in the
OPTION register and the NOCOP bit in the CONFIG register determine the status
of the COP function. Refer to Section 4. Resets, Interrupts, and Low-Power
Modes for a more detailed discussion of the COP function.
8.7 Pulse Accumulator
The MC68HC711D3 has an 8-bit counter that can be configured to operate either
as a simple event counter or for gated time accumulation, depending on the state
of the PAMOD bit in the PACTL register. Refer to the pulse accumulator block
diagram, Figure 8-19.
Figure 8-19. Pulse Accumulator
PACNT
8-BIT COUNTER
2:1
MUX
PA7/
ENABLE
OVERFLOW
1
2
INTERRUPT
REQUESTS
INTERNAL
DATA BUS
INPUT BUFFER
AND
EDGE DETECTION
PACTL CONTROL
TFLG2 INTERRUPT STATUS
TMSK2 INT ENABLES
PA
OVI
PA
II
DDRA
7
PAEN
PAMOD
PEDGE
PA
OVF
PA
IF
OUTPUT
BUFFER
PAI EDGE
PAEN
E ÷ 64 CLOCK
(FROM MAIN TIMER)
PAI/OC1
FROM
MAIN TIMER
OC1
DISABLE
FLAG SETTING
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