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| 型號： | MC92603VF |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 74/126頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX ETH QUAD GIG 256-MAPBGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 4/4 |
| 規(guī)程： | 千兆位以太網(wǎng) |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 256-LBGA |
| 供應(yīng)商設(shè)備封裝： | 256-MAPBGA |
| 包裝： | 托盤 |
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Receiver
MC92603 Quad Gigabit Ethernet Transceiver Reference Manual, Rev. 1
Freescale Semiconductor
3-17
3.7.2
Rate Adaption of Ethernet Packet Data Streams
The MC92603 supports applications in which the device is used to transmit and receive IEEE Std.
802.3-2002, PCS, PMA, type 1000BASE-X packet streams. When the MC92603 is being operated in
reference clock mode, as described in Section 3.6.2, “Reference Clock Timing Mode (RCCE = Low),” rate
adaption is performed to account for frequency offset between the transmitter and receiver. In backplane
applications (see Section 3.6.2, “Reference Clock Timing Mode (RCCE = Low)”), rate adaption is
accommodated by adding K28.5 IDLE code groups to, or deleting K28.5 IDLE code groups from, the data
stream to match the incoming data rate to the receiver data rate as defined by its reference clock frequency.
The indiscriminate addition or deletion of K28.5 IDLE code groups from an 802.3 packet stream would
interfere with proper system operation.
The MC92603 compatibility mode (COMPAT input is high) allows for rate adaption using methods
compatible with Ethernet packet streams and does not interfere with proper system operation. The
following are the features of the compatibility mode:
Context-sensitive rate adaption during receipt of configuration, IDLE, and data code groups
Tolerates up to +100 ppm frequency offset
Supports Jumbo frame lengths of up to 14 Kbytes (if JPACK is high)
Supports frame bursting
Internal or external 8B/10B encoding/decoding may be used
Compatible with IEEE Std. 802.3-2002 Clause 4 specification [4] of media access control function
Compatible with Clause 36 of the specification [4] of physical coding sublayer (PCS) and physical
medium attachment (PMA) sublayer function
Compatible with Clause 37 of the specification [4] of auto-negotiation function
3.7.2.1
Rate Adaption Method
The MC92603 utilizes a FIFO in its receiver to act as an elastic buffer for the receive data interface. The
elastic buffer allows for proper operation of the interface in the presence of jitter and frequency offset.
However, frequency offset will eventually lead to elastic buffer overrun or underrun. In order to prevent
underruns and overruns, one or more code groups must be added to or deleted from the packet stream.
The MC92603 must determine the proper type of code groups to add or delete and do it at an appropriate
time to ensure compatibility with the packet data streams. The code group type and timing is determined
by the current context of the packet stream. There are three contexts considered: configuration, idle, and
data transmission.
3.7.2.2
Configuration Context
The configuration context is when the transceivers are transmitting configuration ordered sets in support
of auto-negotiation. A configuration ordered set consists of alternating /C1/ and /C2/ code group sets as
shown below:
/C1/: /K28.5/D21.5/Dxx.x/Dxx.x
/C2/: /K28.5/D2.2/Dxx.x/Dxx.x
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| MC92603VM | 功能描述:IC ETH TXRX QUAD GIG 256-MAPBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
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| MC92610VF | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Quad 3.125 Gbaud SERDES |
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