參數(shù)資料
型號: MC92603VF
廠商: Freescale Semiconductor
文件頁數(shù): 41/126頁
文件大?。?/td> 0K
描述: IC TXRX ETH QUAD GIG 256-MAPBGA
標準包裝: 1
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 4/4
規(guī)程: 千兆位以太網(wǎng)
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
封裝/外殼: 256-LBGA
供應商設(shè)備封裝: 256-MAPBGA
包裝: 托盤
Introduction
MC92603 Quad Gigabit Ethernet Transceiver Reference Manual, Rev. 1
Freescale Semiconductor
1-5
The MC92603 performs the physical coding sublayer (PCS) and the physical medium attachment (PMA)
sublayer for 1000BASE-X PHY as defined in clause 36 of the IEEE Std. 802.3-2002 specification [4].
Figure 1-3 shows a typical application for the MC92603 which may be used as a quad 1000BASE-X PHY
or in backplane applications. On high density line cards with a large number of Gig-Ethernet ports, it is
desirable to use the RGMII interfaces to reduce the number of signal traces on the PCB.
The MC92603 may be used to interface directly to the Gigabit MACs integrated into the MPC
PowerQUICC III communications processors. They are also interface-compatible to C-Port’s C-3 and
C-5 network processors available from Freescale.
Figure 1-3. PHY and Backplane Applications
1.4
References
The indexed references in this manual are as follows:
[1] Fibre Channel, Gigabit Communications and I/O for Computer Networks, Brenner, 1996.
[2] Byte Oriented DC Balanced 8B/10B Partitioned Block Transmission Code, U.S. Patent
#4,486,739, Dec. 4, 1984.
[3] IEEE Standard Test Access Port and Boundary-Scan Architecture, IEEE Std. 1149.1-1990
(includes IEEE Std. 1149.1a-1993), Oct. 1993.
[4] IEEE Standard Carrier Sense Multiple-Access with Collision Detection (CSMA/CD) Access
Method and Physical Layer Specifications, IEEE Std. 802.3-2002, March 2002.
MC92603
Fiber
Backplane
MC92603
Switch Fabric Card
TBI/RTBI
Line Card—4-Port—1000BASE-X
GMII/RGMII
MC92603
Quad
Backplane
SerDes
Mac
Processors/
Memory/
ASICs
MAC
MC92604
Dual
Ethernet
PHY
Fiber
E/O
Line Card Application
with both
Gigabit Ethernet PHY
and
Backplane Applications
MC92604
Dual
Ethernet
PHY
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