
MOTOROLA
MC68330 USER'S MANUAL
5- 19
the extension word, and the sign-extended contents of the index register (possibly scaled).
The user must specify displacement, address register, and index register.
+
X
MEMORY ADDRES
INTEGER
SIGN EXTENDED
SIGN-EXTENDED VAL
SCALE VALU
OPERAND
0
70
31
0
31
0
GENERATION:
ASSEMBLER SYNTAX:
MODE:
REGISTER:
ADDRESS REGISTER:
DISPLACEMEN
INDEX REGISTER
SCALE
MEMORY ADDRESS:
NUMBER OF EXTENSION WORDS:
1
31
EA = (An) + (Xn*SCALE)
(d
An. SIZE*SCALE)
n
An
8
,
110
This address mode can have either of two different formats of extension. The brief format
(8-bit displacement) requires one word of extension and provides fast indexed addressing.
The full format (16- and 32-bit displacement) provides optional displacement size. Both
forms use an index operand.
For brief format addressing, the address of the operand is the sum of the address in the
address register, the sign-extended displacement integer in the low-order eight bits of the
extension word, and the index operand. The reference is classed as a data reference,
except for the JMP and JSR instructions. The index operand is specified "Ri.sz*scl''.
"Ri" specifies a general data or address register used as an index register. The index
operand is derived from the index register. The index register is a data register if bit [15] =
0 in the first extension word and an address register if bit [15] = 1. The index register
number is given by extension word bits [14-12].
Index size is referred to as "sz". It may be either "W" or "L". Index size is given by bit [11]
of the extension word. If bit [11] = 0, the index value is the sign-extended low-order word
integer of the index register (W). If bit [11] = 1, the index value is the long integer in the
index register (L).
The term "scl'' refers to index scale selection and may be 1, 2, 4, or 8. The index value is
scaled according to bits [10-9]. Codes 00, 01, 10, or 11 select index scaling of 1, 2, 4, or 8,
respectively.
5.3.4.2.6 Address Register Indirect with Index (Base Displacement). The full format
indexed addressing mode requires an index register indicator and an optional 16- or 32-bit
sign-extended base displacement. The index register indicator includes size and scale
information. In this mode, the operand is in memory. The address of the operand is the
sum of the contents of the address register, the scaled contents of the sign-extended
index register, and the base displacement.