參數(shù)資料
型號(hào): M34559G6
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述: 單芯片4位微機(jī)的CMOS
文件頁數(shù): 76/148頁
文件大小: 1732K
代理商: M34559G6
Rev.1.04
REJ03B0188-0104
Aug 23, 2007
Page 76 of 146
4559 Group
Note 1. R” represents read enabled, and “W” represents write enabled.
Note 2. The stopped clock cannot be selected for system clock.
Note 3. “11” cannot be set to the low-order 2 bits (MR
1
, MR
0
) of register MR.
Note 4. The oscillation circuit selected for system clock cannot be stopped.
Clock control register MR
at reset : 1100
2
at power down : state retained
R/W
TAMR/TMRA
MR
3
Operation mode selection bits
MR
3
MR
2
0
0
1
1
MR
1
MR
0
0
0
1
1
Operation mode
0
1
0
1
Through mode
Frequency divided by 2 mode
Frequency divided by 4 mode
Frequency divided by 8 mode
MR
2
MR
1
System clock selection bits (Note 2)
System clock
0
1
0
1
f(RING)
f(X
IN
)
f(X
CIN
)
Not available (Note 3)
MR
0
Clock control register RG
at reset : 000
2
at power down : state retained
W
TRGA
RG
2
Sub-clock (f(X
CIN
)) control bit (Note 4)
0
1
0
1
0
1
Sub-clock (f(X
CIN
)) oscillation available, ports D
6
and D
7
not selected
Sub-clock (f(X
CIN
)) oscillation stop, ports D
6
and D
7
selected
Main clock (f(X
IN
)) oscillation available
Main clock (f(X
IN
)) oscillation stop
On-chip oscillator (f(RING)) oscillation available
On-chip oscillator (f(RING)) oscillation stop
RG
1
Main-clock (f(X
IN
)) control bit (Note 4)
RG
0
On-chip oscillator (f(RING)) control bit
(Note 4)
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