參數(shù)資料
型號(hào)： M34559G6
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述： 單芯片4位微機(jī)的CMOS
文件頁數(shù)： 37/148頁
文件大?。?/td> 1732K
代理商： M34559G6
Rev.1.04
REJ03B0188-0104
Aug 23, 2007
Page 37 of 146
4559 Group
(11) Precautions
Prescaler
Stop prescaler counting and then execute the TABPS
instruction to read its data.
Stop prescaler counting and then execute the TPSAB
instruction to write data to prescaler.
Timer count source
Stop timer 1, 2, 3 or LC counting to change its count source.
Reading the count value
Stop timer 1 or 2 counting and then execute the TAB1 or
TAB2 instruction to read its data.
Writing to the timer
Stop timer 1, 2 or LC counting and then execute the T1AB,
T2AB, T2R2L or TLCA instruction to write data to timer.
Writing to reload register
In order to write a data to the reload register R1 while the timer
1 is operating, execute the TR1AB instruction except a timing
of the timer 1 underflow.
In order to write a data to the reload register R2H while the
timer 2 is operating, execute the T2HAB instruction except a
timing of the timer 3 underflow.
PWM signal
If the timer 2 count stop timing and the timer 2 underflow
timing overlap during output of the PWM signal, a hazard may
occur in the PWM output waveform.
When “H” interval expansion function of the PWM signal is
used, set “1” or more to reload register R2H.
Set the port C output latch to “0” to output the PWM signal
from C/CNTR pin.
Timer 3
Stop timer 3 counting to change its count source.
When operating timer 3 during clock operating mode, set 1
cycle or more of count source to the following period; from
setting bit 2 of register W3 to “1” till executing the POF
instruction.
Prescaler and timer 1 count start timing and count time when
operation starts
Count starts from the first rising edge of the count source (2) in
Figure 35 after prescaler and timer operations start (1) in
Figure 35.
Time to first underflow (3) in Figure 35 is shorter (for up to 1
period of the count source) than time among next underflow
(4) in Figure 35 by the timing to start the timer and count
source operations after count starts.
When selecting CNTR input as the count source of timer 1,
timer 1 operates synchronizing with the falling edge of CNTR
input.
Fig 35. Timer count start timing and count time when
operation starts
Timer 2 and Timer LC count start timing and count time when
operation starts
Count starts from the rising edge (2) after the first falling edge
of the count source, after Timer 2 and Timer LC operations
start (1).
Time to first underflow (3) is different from time among next
underflow (4) by the timing to start the timer and count source
operations after count starts.
Fig 36. Timer count start timing and count time when
operation starts (Timer 2 and Timer LC)
Count source
Count source
(3)
(4)
(1) Timer start
(2)
(When falling edge of
CNTR input is selected)
Timer 1 value
Timer 1 underflow signal
3
2
1
0
3
2
1
0
3
2
Count source
(3)
(4)
(1) Timer start
(2)
Timer value
Timer underflow signal
3
2
1
0
3
2
1
0
3
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