
Rev.1.04
REJ03B0188-0104
Aug 23, 2007
Page 102 of 146
4559 Group
MACHINE INSTRUCTIONS (INDEX BY ALPHABET) (continued)
SZC
(Skip if Zero, Carry flag )
Instruc-
tion
code
0
0
D
9
D
0
1 2
Number of
words
Number of
cycles
Flag CY
Skip condition
0
0
1
0
1
1
1
0
2
F 16
1
1
-
(CY) = 0
Opera-
tion:
(CY) = 0
Grouping:
Description: Skips the next instruction when the contents of carry flag
CY is “0”.
After skipping, the CY flag remains unchanged.
Executes the next instruction when the contents of the CY
flag is “1”.
Arithmetic operation
SZD
(Skip if Zero, port D specified by register Y)
Instruc-
tion
code
0
0
0
0
1
D
9
D
0
0 2
Number of
words
Number of
cycles
Flag CY
Skip condition
0
0
1
0
0
2
4 16
2
2
-
(D(Y)) = 0
0
0
0
0
1
0
1
0
1
1 2
0
2
B 16 Grouping:
Description: Skips the next instruction when a bit of port D specified by
register Y is “0”. Executes the next instruction when the bit
is “1”.
Note:
(Y) = 0 to 5.
Do not execute this instruction if values except above are
set to register Y.
Input/Output operation
Opera-
tion:
(D(Y)) = 0
(Y) = 0 to 5
T1AB
(Transfer data to timer 1 and register R1 from Accumulator and register B)
Instruc-
tion
code
1
0
0
0
1
1
0
0
0
0 2
D
9
D
0
Number of
words
Number of
cycles
Flag CY
Skip condition
2
3
0 16
1
1
-
-
Opera-
tion:
(T1
7
T1
4
)
←
(B)
(R1
7
R1
4
)
←
(B)
(T1
3
T1
0
)
←
(A)
(R1
3
R1
0
)
←
(A)
Grouping:
Description: Transfers the contents of register B to the high-order 4 bits
of timer 1 and timer 1 reload register R1. Transfers the
contents of register A to the low-order 4 bits of timer 1 and
timer 1 reload register R1.
Timer operation
T2AB
(Transfer data to timer 2 and register R2L from Accumulator and register B)
Instruc-
tion
code
1
0
0
0
1
1
0
0
0
1 2
D
9
D
0
Number of
words
Number of
cycles
Flag CY
Skip condition
2
3
1 16
1
1
-
-
Opera-
tion:
(T2
7
T2
4
)
←
(B)
(R2L
7
R2L
4
)
←
(B)
(T2
3
T2
0
)
←
(A)
(R2L
3
R2L
0
)
←
(A)
Grouping:
Description: Transfers the contents of register B to the high-order 4 bits
(T2
7
T2
4
) of timer 2 and the high-order 4 bits (R2L
7
R2L
4
)
of timer 2 reload register R2L. Transfers the contents of
register A to the low-order 4 bits (T2
3
T2
0
) of timer 2 and
the low-order 4 bits (R2L
3
R2L
0
) of timer 2 reload register
R2.
Timer operation