參數(shù)資料
型號(hào): M34559G6
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述: 單芯片4位微機(jī)的CMOS
文件頁數(shù): 145/148頁
文件大?。?/td> 1732K
代理商: M34559G6
Rev.1.04
REJ03B0188-0104
Aug 23, 2007
Page 145 of 146
4559 Group
Voltage drop detection circuit characteristics
Note 1. The detection voltage (V
RST
) is defined as the voltage when reset occurs when the supply voltage (V
DD
) is falling.
Note 2. The detection voltage (V
RST
+) is defined as the voltage when reset is released when the supply voltage (V
DD
) is rising from reset
occurs.
Note 3. When the supply voltage goes lower than the detection voltage (V
SKIP
), the voltage drop detection circuit interrupt request flag
(VDF) is set to “1“.
Note 4. Voltage drop detection circuit operation current (I
RST
) is added to I
DD
(power current) when voltage drop detection circuit is used.
Note 5. The detection time (T
RST
) is defined as the time until reset occurs when the supply voltage (V
DD
) is falling to [V
RST
-
0.1V].
Basic timing diagram
Table 35 Voltage drop detection circuit characteristics (Ta = –20
°
C to 85
°
C, unless otherwise noted)
Symbol
Parameter
Test conditions
Limits
Typ.
1.7
Unit
Min.
Max.
V
RST
-
Detection voltage
(reset occurs) (Note 1)
Ta = 25
°
C
20
°
C
Ta
<
0
°
C
0
°
C
Ta
<
50
°
C
50
°
C
Ta
85
°
C
Ta = 25
°
C
20
°
C
Ta
<
0
°
C
0
°
C
Ta
<
50
°
C
50
°
C
Ta
85
°
C
Ta = 25
°
C
20
°
C
Ta
<
0
°
C
0
°
C
Ta
<
50
°
C
50
°
C
Ta
85
°
C
V
1.6
1.3
1.1
2.2
2.1
1.8
V
RST+
Detection voltage
(reset release) (Note 2)
1.8
V
1.7
1.4
1.2
2.3
2.2
1.9
V
SKIP
Detection voltage
(skip occurs) (Note 3)
2
V
1.9
1.6
1.4
2.5
2.4
2.1
V
RST
+
V
RST
-
I
RST
Detection voltage hysteresis
Operation current (Note 4)
0.1
30
15
6
0.2
V
V
DD
= 5V
V
DD
= 3V
V
DD
= 1.8V
V
DD
(V
RST
-
0.1V)
60
30
12
1.2
μ
A
T
RST
Detection time (Note 5)
ms
System clock
STCK
Port output
D
0
to D
7
P0
0
to P0
3
P1
0
to P1
3
P2
0
to P2
3
P3
0
to P3
3
, C
Port input
D
0
to D
5
P0
0
to P0
3
P1
0
to P1
3
P2
0
to P2
3
P3
0
to P3
3
Interrupt input
INT
Parameter
Pin name
Machine cycle
Mi
Mi + 1
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