Rev.1.04
REJ03B0188-0104
Aug 23, 2007
Page 5 of 146
4559 Group
PIN DESCRIPTION
Table 3
Pin description
Pin
Name
Input/Output
Function
V
DD
V
SS
CNV
SS
Power source
Power source
CNV
SS
Connected to a plus power supply.
Connected to a 0 V power supply.
This pin is shared with the V
PP
pin which is the power source input pin for
programming the built-in QzROM. Connect to V
SS
through a resistor about 5 k
.
This pin is used to operate/stop the voltage drop detection circuit.
When “H“ level is input to this pin, the circuit starts operating.
When “L“ level is input to this pin, the circuit stops operating.
I/O pins of the main clock generating circuit. When using a ceramic resonator,
connect it between pins X
IN
and X
OUT
. A feedback resistor is built-in between them.
When using the RC oscillation, connect a resistor and a capacitor to X
IN
, and leave
X
OUT
pin open.
I/O pins of the sub-clock generating circuit. Connect a 32.768 kHz quartz-crystal
oscillator between pins X
CIN
and X
COUT
. A feedback resistor is built-in between them.
X
CIN
and X
COUT
pins are also used as ports D
6
and D
7
, respectively.
An N-channel open-drain I/O pin for a system reset. When the SRST instruction,
watchdog timer, the built-in power-on reset or the voltage drop detection circuit
causes the system to be reset, the RESET pin outputs “L” level.
Each pin of port D has an independent 1-bit wide I/O function. The output structure
can be switched to N-channel open-drain or CMOS by software. For input use, set
the latch of the specified bit to “1” and select the N-channel open-drain.
Port D
5
is also used as INT pin.
Each pin of port D has an independent 1-bit wide output function. The output
structure is N-channel open-drain.
Ports D
6
and D
7
are also used as X
CIN
pin and X
COUT
pin, respectively.
Port P0 serves as a 4-bit I/O port. The output structure can be switched to N-channel
open-drain or CMOS by software. For input use, set the latch of the specified bit to
“1” and select the N-channel open-drain. Port P0 has a key-on wakeup function and
a pull-up function. Both functions can be switched by software.
Ports P0
0–
P0
3
are also used as SEG
16–
SEG
19
, respectively.
Port P1 serves as a 4-bit I/O port. The output structure can be switched to N-channel
open-drain or CMOS by software. For input use, set the latch of the specified bit to
“1” and select the N-channel open-drain. Port P1 has a key-on wakeup function and
a pull-up function. Both functions can be switched by software.
Ports P1
0–
P1
3
are also used as SEG
20–
SEG
23
, respectively.
Port P2 serves as a 4-bit I/O port. The output structure can be switched to N-channel
open-drain or CMOS by software. For input use, set the latch of the specified bit to
“1” and select the N-channel open-drain. Port P2 has a key-on wakeup function and
a pull-up function. Both functions can be switched by software.
Ports P2
0–
P2
3
are also used as SEG
24–
SEG
27
, respectively.
Port P3 serves as a 4-bit I/O port. The output structure can be switched to N-channel
open-drain or CMOS by software. For input use, set the latch of the specified bit to
“1” and select the N-channel open-drain. Port P3 has a key-on wakeup function and
a pull-up function. Both functions can be switched by software.
Ports P3
0–
P3
3
are also used as SEG
28–
SEG
31
, respectively.
1-bit output port. The output structure is CMOS. Port C is also used as CNTR pin.
LCD common output pins. Pins COM
0
and COM
1
are used at 1/2 duty, pins COM
0–
COM
2
are used at 1/3 duty and pins COM
0–
COM
3
are used at 1/4 duty.
LCD segment output pins.
SEG
0–
SEG
2
pins are used as V
LC3–
V
LC1
pins, respectively.
SEG
16–
SEG
31
pins are used as Ports P0
0–
P0
3,
Ports P1
0–
P1
3
, Ports P2
0–
P2
3
, and
Ports P3
0–
P3
3
, respectively.
CNTR pin has the function to input the clock for the timer 1 event counter and to
output the PWM signal generated by timer 2. CNTR pin is also used as Port C.
INT pin accepts external interrupts. They have the key-on wakeup function which
can be switched by software. INT pin is also used as Port D
5
.
These are the LCD power supply pins. If an internal resistor is used, connect the
V
LC3
pin to the V
DD
pin. (If brightness adjustment is required, connect via a resistor.)
When using an external power supply, apply voltage such that V
SS
≤
V
LC1
≤
V
LC2
≤
V
LC3
≤
V
DD
. Pins V
LC3
to V
LC1
also function as pins SEG
0
to SEG
2
.
VDCE
Voltage drop
detection circuit
enable
Main clock input
Main clock output
Input
X
IN
X
OUT
Input
Output
X
CIN
X
COUT
Sub clock input
Sub clock output
Input
Output
RESET
Reset I/O
I/O
D
0
D
5
I/O port D
(Input is examined
by skip decision.)
I/O
D
6
, D
7
Output port D
Output
P0
0
P0
3
I/O port P0
I/O
P1
0
P1
3
I/O port P1
I/O
P2
0
P2
3
I/O port P2
I/O
P3
0
P3
3
I/O port P3
I/O
C
COM
0
COM
3
Output port C
Common output
Output
Output
SEG
0
SEG
31
Segment output
Output
CNTR
Timer I/O
I/O
INT
Interrupt input
Input
V
LC3
V
LC1
LCD power source