參數(shù)資料
型號(hào): M34559G6
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述: 單芯片4位微機(jī)的CMOS
文件頁(yè)數(shù): 45/148頁(yè)
文件大?。?/td> 1732K
代理商: M34559G6
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Rev.1.04
REJ03B0188-0104
Aug 23, 2007
Page 45 of 146
4559 Group
(4) LCD drive waveform
When “1” is written to a bit in the LCD RAM data, the voltage
difference between common pin and segment pin which
correspond to the bit automatically becomes lV
LC3
l and the
display pixel at the cross section turns on.
When returning from reset, and in the RAM back-up mode, a
display pixel turns off because every segment output pin and
common output pin becomes V
LC3
level.
Fig 46. LCD controller/driver structure
1/2 Duty, 1/2 Bias: When writing (XX10)
2
to address M (1, 2, 8) in RAM.
V
LC3
V
LC1
=V
LC2
V
SS
V
LC3
V
LC1
=V
LC2
V
SS
(2/F)
1
flame
(3/F)
(4/F)
ON
OFF
Voltage level
V
LC3
V
LC2
V
LC1
V
SS
V
LC3
V
LC2
V
LC1
V
SS
Voltage level
V
LC3
V
LC2
V
LC1
V
SS
V
LC3
V
LC2
V
LC1
V
SS
Voltage level
COM
0
COM
0
COM
0
COM
1
COM
1
COM
2
COM
2
COM
3
COM
1
COM
1
COM
2
COM
3
COM
2
COM
1
COM
0
COM
1
COM
0
COM
0
COM
1
SEG
16
SEG
16
SEG
16
SEG
16
SEG
16
COM
2
SEG
16
ON
COM
3
SEG
16
COM
2
SEG
16
COM
1
SEG
16
COM
0
SEG
16
COM
1
SEG
16
OFF
COM
0
SEG
16
ON
COM
0
SEG
16
SEG
16
SEG
16
0
1
X
X
M (1, 2, 8)
(bit 0)
M (1, 2, 8)
1
(bit 0)
M (1, 2, 8)
(bit 0)
(bit 3)
(bit 3)
(bit 3)
0
1
X
ON
OFF
ON
OFF
0
1
0
1
F : LCD clock frequency
X: Set an arbitrary value.
(These bits are not related to
set the drive waveform at each duty.)
1/F
1/F
1/F
1/3 Duty, 1/3 Bias: When writing (X101)
2
to address M (1, 2, 8) in RAM.
1/4 Duty, 1/3 Bias: When writing (1010)
2
to address M (1, 2, 8) in RAM.
1
flame
1
flame
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