參數(shù)資料
型號: M34559G6
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述: 單芯片4位微機(jī)的CMOS
文件頁數(shù): 120/148頁
文件大?。?/td> 1732K
代理商: M34559G6
Rev.1.04
REJ03B0188-0104
Aug 23, 2007
Page 120 of 146
4559 Group
MACHINE INSTRUCTIONS (INDEX BY ALPHABET) (continued)
XAM j
(eXchange Accumulator and Memory data)
Instruc-
tion
code
1
0
1
1
0
D
9
D
0
j
Number of
words
Number of
cycles
Flag CY
Skip condition
1
j
j
j
2
2
D
j
16
1
1
-
-
Opera-
tion:
(A)
(M(DP))
(X)
(X)EXOR(j)
j = 0 to 15
Grouping:
Description: After exchanging the contents of M(DP) with the contents
of register A, an exclusive OR operation is performed
between register X and the value j in the immediate field,
and stores the result in register X.
RAM to register transfer
XAMD j
(eXchange Accumulator and Memory data and Decrement register Y and skip)
Instruc-
tion
code
1
0
1
1
1
1
j
j
j
j
2
D
9
D
0
Number of
words
Number of
cycles
Flag CY
Skip condition
2
F
j
16
1
1
-
(Y) = 15
Opera-
tion:
(A)
(M(DP))
(X)
(X)EXOR(j)
j = 0 to 15
(Y)
(Y)
1
Grouping:
Description: After exchanging the contents of M(DP) with the contents
of register A, an exclusive OR operation is performed
between register X and the value j in the immediate field,
and stores the result in register X.
Subtracts 1 from the contents of register Y.
As a result of subtraction, when the contents of register Y
is 15, the next instruction is skipped. When the contents of
register Y is not 15, the next instruction is executed.
RAM to register transfer
XAMI j
(eXchange Accumulator and Memory data and Increment register Y and skip)
Instruc-
tion
code
1
0
1
1
1
0
j
j
j
j
2
D
9
D
0
Number of
words
Number of
cycles
Flag CY
Skip condition
2
E
j
16
1
1
-
(Y) = 0
Opera-
tion:
(A)
(M(DP))
(X)
(X)EXOR(j)
j = 0 to 15
(Y)
(Y) + 1
Grouping:
Description: After exchanging the contents of M(DP) with the contents
of register A, an exclusive OR operation is performed
between register X and the value j in the immediate field,
and stores the result in register X.
Adds 1 to the contents of register Y. As a result of addition,
when the contents of register Y is 0, the next instruction is
skipped. When the contents of register Y is not 0, the next
instruction is executed.
RAM to register transfer
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