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Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 8 November 2004
38 of 105
Philips Semiconductors
ISP1760
Embedded Hi-Speed USB host controller
This register represents a direct map of the done status of the 32 PTDs. The bit
corresponding to a certain PTD will be set to logic 1 as soon as that PTD execution is
completed. Reading the Done Map register will clear all the bits that are set to logic 1, and
the next reading will reflect the updated status of new executed PTDs.
8.2.12
INT PTD Skip Map register (R/W: 0144h)
Table 28
shows the bit description of the INT PTD Skip Map register.
When a bit in the PTD Skip Map is set to logic 1 that PTD will be skipped although its V bit
may be set. The information in that PTD is not processed. For example, NextPTDPointer
will not affect the order of processing of PTDs. The Skip bit should not be normally set on
the position indicated by NextPTDPointer.
8.2.13
INT PTD Last PTD register (R/W: 0148h)
The bit description of the register is given in
Table 29
.
Once the LastPTD bit corresponding to a PTD is set, this will be the last PTD processed
(checking V = 1) in that PTD category. Subsequently, the process will restart with the first
PTD (of that group). This is useful to reduce the time in which all the PTDs (the respective
memory space) would be checked, especially if only a few PTDs are defined. The
LastPTD bit must be normally set to a higher position than any other position indicated by
the NextPTDPointer from an active PTD.
8.2.14
ATL PTD Done Map register (R: 0150h)
Table 30
shows the bit description of the ATL PTD Done Map register.
This register represents a direct map of the done status of the 32 PTDs. The bit
corresponding to a certain PTD will be set to logic 1 as soon as that PTD execution is
completed. Reading the Done Map register will clear all the bits that are set to logic 1, and
the next reading will reflect the updated status of new executed PTDs.
8.2.15
ATL PTD Skip Map register (R/W: 0154h)
The bit description of the register is given in
Table 31
.
Table 28:
Bit
31 to 0
INT PTD Skip Map register: bit description
Symbol
Access
INT_PTD_SKIP_
MAP[31:0]
Value
FFFF FFFFh
Description
INT PTD Skip Map
: Skip map for each
of the 32 PTDs for the INT transfer
R/W
Table 29:
Bit
31 to 0
INT PTD Last PTD register: bit description
Symbol
Access
INT_PTD_LAST
_PTD[31:0]
Value
0000 0000h
INT PTD Last PTD
: Last PTD of the
32 PTDs as indicated by the 32 bitmap.
1h —
One PTD in INT
2h —
Two PTDs in INT
3h —
Three PTDs in INT.
Description
R/W
Table 30:
Bit
31 to 0 ATL_PTD_DONE
_MAP[31:0]
ATL PTD Done Map register: bit description
Symbol
Access
R
Value
0000 0000h
Description
ATL PTD Done Map
: Done map for
each of the 32 PTDs for the ATL transfer