參數(shù)資料
型號: ISP1760
廠商: NXP Semiconductors N.V.
英文描述: Hi-Speed Universal Serial Bus host controller for embedded applications
中文描述: 高速嵌入式應用的通用串行總線主控制器
文件頁數(shù): 28/105頁
文件大?。?/td> 449K
代理商: ISP1760
9397 750 13257
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 8 November 2004
28 of 105
Philips Semiconductors
ISP1760
Embedded Hi-Speed USB host controller
8.1 EHCI capability registers
8.1.1
CAPLENGTH register (R: 0000h)
The bit description of the Capability Length (CAPLENGTH) register is given in
Table 6
.
8.1.2
HCIVERSION register (R: 0002h)
Table 7
shows the bit description of the Host Controller Interface Version Number
(HCIVERSION) register.
8.1.3
HCSPARAMS register (R: 0004h)
The Host Controller Structural Parameters (HCSPARAMS) register is a set of fields that
are structural parameters. The bit allocation is given in
Table 8
.
0340h
0344h
0354h
0374h
Interrupt registers
0310h
0314h
0318h
031Ch
0320h
0324h
0328h
032Ch
Edge Interrupt Count
DMA Start Address
Power Down Control
Port 1 Control
0000 000Fh
0000 0000h
03E8 1BA0h
0086 0086h
Section 8.3.9 on page 45
Section 8.3.10 on page 46
Section 8.3.11 on page 46
Section 8.3.12 on page 48
Interrupt
Interrupt Enable
ISO IRQ Mask OR
INT IRQ Mask OR
ATL IRQ Mask OR
ISO IRQ Mask AND
INT IRQ Mask AND
ATL IRQ Mask AND
0000 0000h
0000 0000h
0000 0000h
0000 0000h
0000 0000h
0000 0000h
0000 0000h
0000 0000h
Section 8.4.1 on page 50
Section 8.4.2 on page 51
Section 8.4.3 on page 53
Section 8.4.4 on page 53
Section 8.4.5 on page 53
Section 8.4.6 on page 54
Section 8.4.7 on page 54
Section 8.4.8 on page 54
Table 5:
Address
Register overview
…continued
Register
Reset value
References
Table 6:
Bit
7 to 0
CAPLENGTH register: bit description
Symbol
Access
CAPLENGTH
[7:0]
Value
20h
Description
Capability Length
: This is used as an offset. It
is added to the register base to find the
beginning of the operational register space.
R
Table 7:
Bit
HCIVERSION register: bit description
Symbol
Access Value
HCIVERSION
[15:0]
Description
Host Controller Interface Version Number
: It
contains a BCD encoding of the version number of
the interface to which the Host Controller interface
conforms.
R
0100h
Table 8:
Bit
Symbol
Reset
Access
HCSPARAMS register: bit allocation
31
30
29
28
27
26
25
24
reserved
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
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