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參數(shù)資料
| 型號： | IBM038329NP6B |
| 廠商： | IBM Microeletronics |
| 英文描述： | 256K x 32 Synchronous Graphics RAM(256K x 32 高性能8M位CMOS同步動態(tài)RAM（帶內(nèi)置的圖形性能）) |
| 中文描述： | 256K × 32同步圖形RAM（256K × 32位高性能800萬的CMOS同步動態(tài)隨機存儲器（帶內(nèi)置的圖形性能）） |
| 文件頁數(shù)： | 59/66頁 |
| 文件大?。?/td> | 952K |
| 代理商： | IBM038329NP6B |
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IBM038329NL6B
IBM038329NP6B
256K x 32 Synchronous Graphics RAM
03K4292.E35604
Revised 3/98
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 59 of 66
Precharge Command
The Precharge command is used to deactivate the open row in a particular bank, or the open row in both
banks. To activate or open another row in the same bank, the user must initiate the Precharge command.
This process causes a significant latency known as Row Latency.
The bank(s) will be available for a subsequent row access some specified time (t
RP
) after the Precharge com-
mand is issued. Once a bank has been precharged, it is in an idle state and must be activated prior to any
Read, Write, or Block Write commands being issued to the same bank.
Power Down
Power Down occurs when both banks are in idle states (precharged) and CKE is registered low. Entering
Power Down deactivates the input and output buffers, excluding CKE for maximum power savings while in
standby. In this mode the internal clock is suspended to save power. The device should be refreshed every
16ms to keep the DRAMs cells alive by initiating Auto Refresh command cycles. Note that in Power Down
Mode no internal refresh operations are being performed.
The Power Down state is exited by taking CKE back high. CKE must go high t
CKS
before a positive clock
edge, after meeting t
CKH
from the previous clock edge. The first command after exiting Power Down will be
registered on the clock edge following t
CKS
. Exiting Power Down at clock edge n will put the device in the “all
banks idle” state in time for clock edge n+1.
Logic Table for Precharge Command
Mnemonic
CKE
CS
RAS
CAS
WE
DSF
DQM
BA (A9)
A8
A7-A0
PRE
H
L
L
L
L
L
X
BS
L
X
PREAL
H
L
L
L
L
L
X
X
H
X
Logic Table for Power Down
Mnemonic
CKE
CS
RAS
CAS
WE
DSF
DQM
BA (A9)
A8
A7-A0
n-1
n
PDN (ENT)
H
L
X
X
X
X
X
X
X
X
X
PDN (EXT)
L
H
X
X
X
X
X
X
X
X
X
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