- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379203 > IBM038329NP6B (IBM Microeletronics) 256K x 32 Synchronous Graphics RAM(256K x 32 高性能8M位CMOS同步動態(tài)RAM（帶內(nèi)置的圖形性能）) PDF資料下載
參數(shù)資料
| 型號： | IBM038329NP6B |
| 廠商： | IBM Microeletronics |
| 英文描述： | 256K x 32 Synchronous Graphics RAM(256K x 32 高性能8M位CMOS同步動態(tài)RAM（帶內(nèi)置的圖形性能）) |
| 中文描述： | 256K × 32同步圖形RAM（256K × 32位高性能800萬的CMOS同步動態(tài)隨機存儲器（帶內(nèi)置的圖形性能）） |
| 文件頁數(shù)： | 47/66頁 |
| 文件大小： | 952K |
| 代理商： | IBM038329NP6B |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁當(dāng)前第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁
IBM038329NL6B
IBM038329NP6B
256K x 32 Synchronous Graphics RAM
03K4292.E35604
Revised 3/98
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 47 of 66
Terminating a Write Burst
The fixed-length or full-page Write bursts can be truncated with the Burst Terminate command. When truncat-
ing a Write burst, the input data applied one clock edge prior to the Burst Terminate command will be the last
data written.
Masked Writes
Any Write performed to a row that was activated via an Active with WPB command is a Write-per-Bit-Mask
(WPBM). Data is written to the 32 cells at the selected column location subject to the mask stored in the WPB
mask register. The data will be written to the DRAM cell according to the following logic:
If a particular bit in the WPB mask register is a “0”, the data appearing on the corresponding DQ input will be
ignored, and the existing data in the corresponding DRAM cell will remain unchanged. If a mask data is a “1”,
the data appearing on the corresponding DQ input will be written to the corresponding DRAM cell.
The over-
all Write mask consists of a combination of the DQM inputs, which mask on a per-byte basis, and the
WPB mask register, which masks on a per-bit basis
. If a particular DQM signal was registered high, the
corresponding byte will be masked. A given bit is written if the corresponding DQM signal registered is “0”
and the corresponding WPB mask register bit is “1”. Note that the DQM Latency for Write is zero.
DQM
MR
DRAM Cell
0
0
Mask
1
0
Mask
1
1
Mask
0
1
Write
Write Masking Functional Representation
Mask
Register
DRAM Cell
DQ
DQM
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IBM041812PQKB | 64K X 18 BURST SRAM(64K X 18高性能可猝發(fā)同步CMOS靜態(tài)RAM) |
| IBM041813PPLB | 64K X 18 BURST PIPELINE SRAM(1M (64K X 18)同步可猝發(fā)流水線式線式高性能靜態(tài)RAM) |
| IBM041813PQKB | 64K X 18 Burst Pipeline SRAM(1M（64K X 18）高性能同步可猝發(fā)管線式靜態(tài)RAM) |
| IBM041814PPLB | 64K X 18 BURST SRAM(1M (64K X 18)同步可猝發(fā)高性能靜態(tài)RAM) |
| IBM041814PQKB | 64K X 18 BURST SRAM(1M（64K X 18）高性能同步可猝發(fā)CMOS靜態(tài)RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IBM038329NQ6A-7R5 | 制造商:IBM 功能描述: |
| IBM041812PQKB10 | 制造商:IBM 功能描述:* |
| IBM041812PQKB11 | 制造商:IBM 功能描述:* |
| IBM041813PQKB5 | 制造商:IBM 功能描述: |
| IBM0418A4ACLAA-4F | 制造商:IBM 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。