參數(shù)資料
型號: HYB18T256324F-22
廠商: INFINEON TECHNOLOGIES AG
英文描述: 256-Mbit GDDR3 DRAM [600MHz]
中文描述: 256兆GDDR3顯示內(nèi)存[600MHz的]
文件頁數(shù): 49/80頁
文件大?。?/td> 2026K
代理商: HYB18T256324F-22
HYB18T256324F–[16/20/22]
256-Mbit DDR SGRAM
Functional Description
Data Sheet
49
Rev. 1.11, 04-2005
10292004-DOXT-FS0U
3.8.3
Consecutive Read Bursts
3.8.3.1
Gapless Bursts
Figure 32
Gapless Consecutive Read Bursts
1. The second RD command may be either for the same bank or another bank
2. Shown with nominal
t
AC
and
t
DQSQ
3. Example applies only when READ commands are issued to same device
4. RDQS will start driving high 1/2 cycle prior to the first falling edge and stop 1/2 cycle after the last rising edge
of RDQS
5. The DQ terminations are switched off 1 cycle before the first Read Data and on again 1 cycle after the last
Read data
#,+
#,+
. $
. $
#O M
. $
. $
. $
" #X
!DDR
#!3 LATENCY
2$13
2$13
$1
$1
$X
$X
$X
$Y $ Y $ Y
$Y
$X
#!3 LATENCY
$ONgT #ARE
$1S4
2$1 3 .O T DRIVEN
$X
$X
$X
$Y $ Y $ Y
$Y
$X
. $
. $
" # X
" # Y
"ANK #O LUMN ADDRESS X
"ANK #OLUMN ADDRESS Y
2 $
. $
2%!$
./0 OR $ESELECT
$X
$Y
$ ATA FROM " #X
$ ATA FROM " #Y
#OM
!DDR
#OMMAND
!DDRE SS " #
ERMINATIONS OFF
2$
. $
. $
. $
2$
" #Y
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