參數(shù)資料
型號(hào)： HMT351V7BFR8C-H9
廠商： HYNIX SEMICONDUCTOR INC
元件分類： DRAM
英文描述： DDR DRAM MODULE, DMA240
封裝： ROHS COMPLIANT, DIMM-240
文件頁(yè)數(shù)： 5/61頁(yè)
文件大?。?/td> 1050K
代理商： HMT351V7BFR8C-H9
Rev. 0.1 / Feb. 2010
13
4GB, 512Mx72 Module(2Rank of x8) - page1
DQS_t
DQS_c
TDQS_t
TDQS_c
D17
DQ [7:0]
ZQ
RAS_n
CA
S
_
n
CS
_
n
WE_
n
CK
_
t
CK
_
c
CK
E
OD
T
A[
N
:O
]/B
A[
N
:O
]
RR
AS
A
_
n
RC
AS
A
_
n
RS0A
_n
RW
EA_
n
PC
K0
A_
t
PC
K
0
A_c
RCK
E
0A
ROD
T
0A
A[
N
:O
]A
Vtt
/BA
[N:O]A
R
S
1A_c
PC
K1
A_
t
PCK
1
A_
c
RC
KE1
A
RO
D
T
1
A
DQ[31:24]
DQS3_t
DQS3_c
DM3/DQS12_t
DQS12_c
DQS_t
DQS_c
TDQS_t
TDQS_c
D3
DQ [7:0]
ZQ
RA
S
_
n
CA
S_
n
CS_
n
WE
_
n
CK
_
t
CK
_
c
CK
E
OD
T
A[
N
:O
]/
B
A[
N
:O
]
DQS_t
DQS_c
TDQS_t
TDQS_c
D12
DQ [7:0]
ZQ
RAS_n
CAS
_
n
CS
_
n
WE_
n
CK_
t
CK_
c
CKE
OD
T
A[
N
:O
]/B
A[
N
:O
]
DQ[23:16]
DQS2_t
DQS2_c
DM2/DQS11_t
DQS11_c
DQS_t
DQS_c
TDQS_t
TDQS_c
D2
DQ [7:0]
ZQ
RAS_n
CA
S_
n
CS
_
n
WE_
n
CK
_
t
CK
_
c
CK
E
OD
T
A[
N:
O]/
B
A[
N:
O]
DQS_t
DQS_c
TDQS_t
TDQS_c
D11
DQ [7:0]
ZQ
RA
S
_
n
CA
S_
n
CS
_
n
WE
_n
CK
_
t
CK
_
c
CK
E
OD
T
A[
N
:O
]/
B
A[
N
:O
]
DQ[15:8]
DQS1_t
DQS1_c
DM1/DQS10_t
DQS10_c
DQS_t
DQS_c
TDQS_t
TDQS_c
D1
DQ [7:0]
ZQ
RAS_
n
CAS
_
n
CS
_
n
WE_
n
CK_
t
CK_
c
CKE
OD
T
A[O
:N]/B
A[N:
O
]
DQS_t
DQS_c
TDQS_t
TDQS_c
D10
DQ [7:0]
ZQ
RAS_n
CA
S_
n
CS
_
n
WE_
n
CK
_
t
CK
_
c
CK
E
OD
T
A[
O:
N]/
B
A[
N:
O]
DQ[7:0]
DQS0_t
DQS0_c
DM0/DQS9_t
DQS9_c
DQS_t
DQS_c
TDQS_t
TDQS_c
D0
DQ [7:0]
ZQ
RAS_n
CA
S
_
n
CS
_
n
WE_
n
CK
_
t
CK
_
c
CK
E
OD
T
A[
N:
O]/
B
A[
N:
O]
DQS_t
DQS_c
TDQS_t
TDQS_c
D9
DQ [7:0]
ZQ
RAS
_
n
CAS
_
n
CS
_
n
WE_
n
CK_
t
CK_
c
CKE
OD
T
A[N:
O]
/B
A[N:
O]
CB[7:0]
DQS8_t
DQS8_c
DM8/DQS17_t
DQS17_c
DQS_t
DQS_c
TDQS_t
TDQS_c
D8
DQ [7:0]
ZQ
RAS_n
CAS
_
n
CS
_
n
WE_
n
CK
_
t
CK
_
c
CK
E
OD
T
A[
N
:O]/
B
A[
N
:O]
DQS_t
DQS_c
TDQS_t
TDQS_c
D13
DQ [7:0]
ZQ
RAS_n
CA
S
_
n
CS
_
n
WE_
n
CK
_
t
CK
_
c
CK
E
OD
T
A[
N
:O
]/B
A[
N
:O
]
RR
ASB
RC
ASB
RS0B
RW
EB
PC
K0
B
PC
K
0
B
RCK
E
0B
ROD
T
0B
A[
N
:O
]B
Vtt
/BA
[N:O]B
RS
1
B
PC
K1
B
PCK
1
B
RC
KE1
B
RO
D
T
1
B
DQ[47:40]
DQS5_t
DQS5_c
DM5/DQS14_t
DQS14_
DQS_t
DQS_c
TDQS_t
TDQS_c
D5
DQ [7:0]
ZQ
RA
S
_
n
CA
S_
n
CS_
n
WE
_
n
CK
_
t
CK
_
c
CK
E
OD
T
A[
N
:O
]/
B
A[
N
:O
]
DQS_t
DQS_c
TDQS_t
TDQS_c
D14
DQ [7:0]
ZQ
RAS_n
CAS
_
n
CS
_
n
WE_
n
CK_
t
CK_
c
CKE
OD
T
A[
N
:O
]/B
A[
N
:O
]
DQ55:48]
DQS6_t
DQS6_c
DM6/DQS15_t
DQS15_c
DQS_t
DQS_c
TDQS_t
TDQS_c
D6
DQ [7:0]
ZQ
RAS_n
CA
S_
n
CS
_
n
WE_
n
CK
_
t
CK
_
c
CK
E
OD
T
A[
N:
O]/
B
A[
N:
O]
DQS_t
DQS_c
TDQS_t
TDQS_c
D15
DQ [7:0]
ZQ
RA
S
_
n
CA
S_
n
CS
_
n
WE
_n
CK
_
t
CK
_
c
CK
E
OD
T
A[
N
:O
]/
B
A[
N
:O
]
DQ[63:56]
DQS7_t
DQS7_c
DM7/DQS16_t
DQS16_c
DQS_t
DQS_c
TDQS_t
TDQS_c
D7
DQ [7:0]
ZQ
RAS_
n
CAS
_
n
CS
_
n
WE_
n
CK_
t
CK_
c
CKE
OD
T
A[N:
O
]/B
A[N:
O
]
DQS_t
DQS_c
TDQS_t
TDQS_c
D16
DQ [7:0]
ZQ
RAS_n
CA
S_
n
CS
_
n
WE_
n
CK
_
t
CK
_
c
CK
E
OD
T
A[
O:
N]/
B
A[
N:
O]
DQ[39:32]
DQS4_t
DQS4_c
DM4/DQS13-t
DQS13_c
DQS_t
DQS_c
TDQS_t
TDQS_c
D4
DQ [7:0]
ZQ
RAS_n
CAS
_
n
CS
_
n
WE_
n
CK
_
t
CK
_
c
CK
E
OD
T
A[
N
:O]/
B
A[
N
:O]
D0–D17
VDD
D0–D17
VTT
VDDSPD
D0–D17
VREFDQ
Serial PD
VREFCA
VSS
D0–D17
Note:
1. DQ-to-I/O wiring may be changed within a byte.
2. Unless otherwise noted, resistor values are 15
%.
3. ZQ resistors are 240
%. For all other resistor values
refer to the appropriate wiring diagram.
4. See the wiring diagrams for all resistors associated with the
command, address and control bus.
VDDSPD
EVENT
SCL
SDA
SA0
SPD with
Integrated
TS
SA1
SA2
VSS
VDDSPD
EVENT_n
SCL
SDA
SA0
SA1
SA2
VSS
Plan to use SPD with Integrated TS of Class B and
might be changed on customer’s requests. For more
details of SPD and Thermal sensor, please contact
local Hynix sales representative
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HMT351V7BMR4C-G7 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:240pin DDR3 SDRAM VLP Registered DIMM
HMT351V7BMR4C-H9 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:240pin DDR3 SDRAM VLP Registered DIMM
HMT351V7BMR8C-G7 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:240pin DDR3 SDRAM VLP Registered DIMM
HMT351V7BMR8C-H9 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:240pin DDR3 SDRAM VLP Registered DIMM
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