參數(shù)資料
型號: HMT351V7BFR8C-H9
廠商: HYNIX SEMICONDUCTOR INC
元件分類: DRAM
英文描述: DDR DRAM MODULE, DMA240
封裝: ROHS COMPLIANT, DIMM-240
文件頁數(shù): 28/61頁
文件大?。?/td> 1050K
代理商: HMT351V7BFR8C-H9
Rev. 0.1 / Feb. 2010
34
Overshoot and Undershoot Specifications
Address and Control Overshoot and Undershoot Specifications
Address and Control Overshoot and Undershoot Definition
AC Overshoot/Undershoot Specification for Address and Control Pins
Parameter
DDR3-800 DDR3-1066 DDR3-1333 Units
Maximum peak amplitude allowed for overshoot area. (See figure below)
0.4
V
Maximum peak amplitude allowed for undershoot area. (See figure below)
0.4
V
Maximum overshoot area above VDD (See figure below)
0.67
0.5
0.4
V-ns
Maximum undershoot area below VSS (See figure below)
0.67
0.5
0.4
V-ns
(A0-A15, BA0-BA3, CS, RAS, CAS, WE, CKE, ODT)
See figure below for each parameter definition
M aximum Am plitude
Overshoot Area
VDD
VSS
M axim um Am plitude
Undershoot Area
Tim e (ns)
Address and Control Overshoot and Undershoot Definition
Volts
(V)
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