參數(shù)資料
型號: HMT351V7BFR8C-H9
廠商: HYNIX SEMICONDUCTOR INC
元件分類: DRAM
英文描述: DDR DRAM MODULE, DMA240
封裝: ROHS COMPLIANT, DIMM-240
文件頁數(shù): 31/61頁
文件大?。?/td> 1050K
代理商: HMT351V7BFR8C-H9
Rev. 0.1 / Feb. 2010
37
DDR3-1066 Speed Bins
For specific Notes See “Speed Bin Table Notes” on page 39.
Speed Bin
DDR3-1066F
Unit
Note
CL - nRCD - nRP
7-7-7
Parameter
Symbol
min
max
Internal read command to
first data
tAA
13.125
20
ns
ACT to internal read or
write delay time
tRCD
13.125
ns
PRE command period
tRP
13.125
ns
ACT to ACT or REF
command period
tRC
50.625
ns
ACT to PRE command
period
tRAS
37.5
9 * tREFI
ns
CL = 5
CWL = 5
tCK(AVG)
Reserved
ns
1, 2, 3, 4, 5
CWL = 6
tCK(AVG)
Reserved
ns
4
CL = 6
CWL = 5
tCK(AVG)
2.5
3.3
ns
1, 2, 3, 5
CWL = 6
tCK(AVG)
Reserved
ns
1, 2, 3, 4
CL = 7
CWL = 5
tCK(AVG)
Reserved
ns
4
CWL = 6
tCK(AVG)
1.875
< 2.5
ns
1, 2, 3, 4
CL = 8
CWL = 5
tCK(AVG)
Reserved
ns
4
CWL = 6
tCK(AVG)
1.875
< 2.5
ns
1, 2, 3
Supported CL Settings
6, 7, 8
nCK
Supported CWL Settings
5, 6
nCK
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