April 30, 1998
GENERAL RELEASE SPECIFICATION
MC68HC05PL4
REV 2.0
MOTOROLA
v
LIST OF FIGURES
Title
Figure
Page
1-1
1-2
1-3
1-4
1-5
2-1
2-2
2-3
2-4
3-1
4-1
4-2
4-3
4-4
4-5
4-6
4-7
5-1
5-2
5-3
5-4
5-5
5-6
5-7
6-1
7-1
8-1
9-1
9-2
9-3
9-4
9-5
9-6
9-7
9-8
9-9
9-10
9-11
9-12
10-1
10-2
10-3
11-1
MC68HC05PL4 Block Diagram .......................................................................1-2
MC68HC05PL4 Pin Assignment......................................................................1-3
MC68HC05PL4B Pin Assignment ...................................................................1-3
Oscillator Connections.....................................................................................1-4
Miscellaneous Control and Status Register (MICSR)......................................1-5
MC68HC05PL4 Memory Map..........................................................................2-1
COP Watchdog Register (COPR)....................................................................2-2
I/O Registers $0000-$000F..............................................................................2-3
I/O Registers $0010-$001F..............................................................................2-4
MC68HC05 Programming Model.....................................................................3-1
Interrupt Stacking Order...................................................................................4-2
Interrupt Flowchart...........................................................................................4-3
External Interrupt Logic....................................................................................4-5
Miscellaneous Control and Status Register (MICSR)......................................4-5
Pull-Up Enable Register (PUER) .....................................................................4-7
Keyboard Interrupt Enable Register (KIER).....................................................4-7
Keyboard Interrupt Flag Register (KIFR) .........................................................4-7
Reset Sources .................................................................................................5-1
Miscellaneous Control and Status Register (MICSR)......................................5-2
COP Watchdog Block Diagram........................................................................5-3
COP Watchdog Register (COPR)....................................................................5-3
Miscellaneous Control and Status Register (MICSR)......................................5-4
Stop Recovery Timing Diagram.......................................................................5-7
Internal Reset Timing Diagram ........................................................................5-8
STOP/WAIT Flowchart.....................................................................................6-3
Port Input/Output Circuitry ...............................................................................7-1
System Clock Control Register (SYSCR) ........................................................8-1
Programmable Timer Block Diagram...............................................................9-1
Timer Counter and Register Block Diagram ....................................................9-2
Programmable Timer Registers (TMRH, TMRL)..............................................9-3
Alternate Counter Block Diagram ....................................................................9-4
Alternate Counter Registers (ACRH, ACRL) ...................................................9-4
Timer Input Capture Block Diagram.................................................................9-5
Input Capture Registers (ICRH, ICRL).............................................................9-6
Timer Output Compare Block Diagram............................................................9-7
Output Compare Registers (OCRH, OCRL) ....................................................9-7
Timer Control Register (TCR)..........................................................................9-8
Miscellaneous Control and Status Register (MISCR)......................................9-9
Timer Status Registers (TSR)........................................................................9-10
Timer8 Block Diagram ...................................................................................10-1
Timer8 Control and Status Register...............................................................10-2
Timer8 Counter Register................................................................................10-3
DAC Control and Data Register.....................................................................11-1
F
Freescale Semiconductor, Inc.
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