參數(shù)資料
型號： HC05PL4GRS
英文描述： 68HC05PL4A. 68HC05PL4B. 68HC705PL4B General Release Specification
中文描述： 68HC05PL4A。 68HC05PL4B。 68HC705PL4B一般版本規(guī)范
文件頁數(shù)： 50/98頁
文件大小： 1004K
代理商： HC05PL4GRS
GENERAL RELEASE SPECIFICATION
April 30, 1998
MOTOROLA
8-2
SYSTEM CLOCKS
MC68HC05PL4
REV 2.0
FMODE — Fast Mode RC select
FMODE selects the oscillating frequency of the internal RC. After power-on-
reset, the default setting is 500kHz.
1 =
Internal RC oscillates at 500kHz
0 =
Internal RC oscillates at 20kHz
OSCF — OSC running Flag
This bit is set when the external clock (External/crystal) from OSC1 is on.
See also CKOSC bit below.
RCF — RC Running Flag
This bit is set when the internal RC clock is on.
CKOSC — ChecK OSC
The CKOSC bit enables the internal logic for external clock selection. The pro-
cedure below should be followed when switching from RC to external clock.
1.
Set the CKSEL1 and CKSEL2 bits for external clock source.
2.
If crystal option is used — set the 8-bit timer for counting crystal
stabilization delay (typically 4064 clock cycles).
3.
Write a “1” to the CKOSC bit and check for OSCF bit set.
4.
If the OSCF bit is not set, no external clock is available, the internal RC
clock will be used as the system clock, irrespective of the setting for
CKSEL1 and CKSEL2.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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