參數(shù)資料
型號(hào): HC05PL4GRS
英文描述: 68HC05PL4A. 68HC05PL4B. 68HC705PL4B General Release Specification
中文描述: 68HC05PL4A。 68HC05PL4B。 68HC705PL4B一般版本規(guī)范
文件頁(yè)數(shù): 17/98頁(yè)
文件大小: 1004K
代理商: HC05PL4GRS
April 30, 1998
GENERAL RELEASE SPECIFICATION
MC68HC05PL4
REV 2.0
MEMORY
MOTOROLA
2-1
SECTION 2
MEMORY
This section describes the organization of the memory on the MC68HC05PL4.
2.1
MEMORY MAP
The CPU can address 8k-bytes of memory space as shown in
ROM portion of the memory holds the program instructions, fixed data, user
defined vectors, and interrupt service routines. The RAM portion of memory holds
variable data. I/O registers are memory mapped so that the CPU can access their
locations in the same way that it accesses all other memory locations.
Figure 2-1
. The
Figure 2-1. MC68HC05PL4 Memory Map
I/O REGISTERS
32 BYTES
USER RAM
256 BYTES
UNUSED
USER ROM
4096 BYTES
SELF-CHECK ROM
496 BYTES
$0000
$001F
$0020
$0120
$0DFF
$0E00
$1DFF
$1E00
$1FEF
$1FF0
$1FFF
$00C0
$011F
STACK
64 BYTES
USER VECTORS
16 BYTES
RESERVED
RESERVED
KEYBOARD
8-BIT TIMER
16-BIT TIMER
IRQ
SWI
RESET
$1FF0-$1FF1
$1FF2-$1FF3
$1FF4-$1FF5
$1FF6-$1FF7
$1FF8-$1FF9
$1FFA-$1FFB
$1FFC-$1FFD
$1FFE-$1FFF
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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