參數(shù)資料
型號: FMMT560A
文件頁數(shù): 36/247頁
文件大?。?/td> 2493K
代理商: FMMT560A
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5
www.fairchildsemi.com
FM93C46A Rev. A
F
MICROWIRE I/O Pin Description
Chip Select (CS):
This pin enables and disables the MICROWIRE device and
performs 3 general functions:
1. When in the low state, the MICROWIRE device is disabled
and the output tri-stated (high impedance). If this pin is
brought high (rising edge active), all internal registers are
reset and the device is enabled, allowing MICROWIRE
communication via DI/DO pins. To restate, the CS pin must
be held high during all device communication and opcode
functions. If the CS pin is brought low, all functions will be
disabled and reset when CS is brought high again. The
exception to this is when a programming cycle is initiated
(see 2 and 3). Again, all activity on the CS, DI and DO pins
is ignored until CS is brought high.
2. After entering all required opcode and address data, bringing
CS low initiates the (asynchronous) programming cycle.
3. When programming is in progress, the Data-Out pin will
display the programming status as either BUSY (DO low) or
READY (DO high) when CS is brought high. (Again, the
output will be tri-stated when CS is low.) To restate, during
programming, the CS pin may be brought high and low any
number of times to view the programming status without
affect the programming operation. Once programming is
completed (Output in READY state), the output is 'cleared'
(returned to normal tri-state condition) by clocking in a Start
Bit. After the Start Bit is clocked in, the output will return to a
tri-stated condition. When clocked in, this Start Bit can be the
first bit in a command string, or CS can be brought low again
to reset all internal circuits.
Serial Clock (SK):
This pin is the clock input (rising edge active) for clocking in all
opcodes and data on the DI pin and clocking out all data on the DO
pin. However, this pin has no effect on the asynchronous program-
ming cycle (see the CS pin section) as the BUSY/READY status
is a function of the CS pin only.
Data-In (DI):
All serial communication
into
the device is performed using this
input pin (rising edge active). In order to avoid false Start Bits, or
related issues, it is advised to keep the DI pin in the low state
unless actually clocking in data bits (Start Bit, Opcode, Address or
incoming data bits to be programmed). Please note that the first
'1' clocked into the device (after CS is brought high) is seen as a
Start Bit and the beginning of a serial command string, so caution
must be observed when bringing CS high.
Data-Out (DO):
All serial communication
out of
the device, Read Data ( during
normal reads) as well as READY/BUSY status indication ( during
programming ) are performed using this output pin. Note that,
during READ operations, the EEPROM device starts to drive the
DO output pin "active" after the last address bit (A0) is clocked in.
Hence in applications where 3-wire configuration is required (
where DI and DO pins are tied together ) caution must be observed
for correct operation. Please refer AN-758 for further information.
Organization (ORG):
This pin controls the device architecture (8-bit data word vs. 16-bit
data word). If the ORG pin is brought to V
CC
, the device is
configured with a 16-bit data word and if the ORG pin is brought
to V
(Ground), the device is configured with an 8-bit data word.
If the ORG pin is left floating, the device will default to a 16-bit data
word.
Instruction Set for the FM93C46A
ORG
Pin
Logic
Memory
Configuration
# of Address Bits
0
128 x 8
7 Bits
1
64 x 16
6 Bits
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