參數(shù)資料
型號(hào): FBGA
英文描述: FBGA - FBGA User's Guide. Version 4.2
中文描述: FBGA封裝- FBGA封裝用戶指南。版本4.2
文件頁數(shù): 79/97頁
文件大?。?/td> 2624K
代理商: FBGA
FBGA User’s Guide
78
Version 4.2, November 1, 2002
Memo on
Ψ
J–T
, Case Level Thermal Parameter
1
MSD Engineering
Memo on
Ψ
J-T
, Case Level Thermal Parameter
Introduction
A new thermal parameter has been developed by the EIA/JEDEC JC15.1 subcommittee on
thermal phenomenon in electronic packaging. The parameter is called
Ψ
J-T
, (psi j-t) and is a
modification and replacement of the much abused junction-to-case thermal resistance,
value for plastic packages. This memo outlines the history and physical description of
measurements, and shows why they are poor performance indicators for plastic packages.
The
Ψ
J-T
parameter is introduced and its use is explained.
θ
JC
,
θ
JC
History
θ
JC
is a measurement that is used to describe the internal thermal resistance of a packaged
semiconductor device. Originally, the measurement was developed as a method of
calculating junction temperature (T
J
) from a known reference point on the outside of the
package. The natural place for this reference point is defined as "the shortest thermal path
from the junction to the outside of the package," which is also the best heat sinking surface.
In the days when the specification was generated, the mainstream package was the
ceramic DIP, which for the military, were mounted onto 'cold rails'; flat liquid cooled tubes
that contacted the bottoms of the DIPS in the application. These cold rails were held at a
constant temperature and served as a reference point for calculating T
J
.
The test method is performed by bringing the desired package surface to thermal
equilibrium, an isothermal case condition at some defined temperature, by using a large
cold plate or heat sink. The idea is to keep the external package temperature constant
while the device is powered up. Heating voltage and current are supplied to the device to
power up the die while keeping the package surface at the initial defined temperature.
When the device comes to steady-state temperature and power conditions, the junction
temperature is measured and junction to case thermal resistance is calculated using
equation (1).
θ
JC
= T
J
-T
R
/P
D
(1)
where:
T
J
= junction temperature
T
R
= reference temperature (case)
P
D
= Power dissipation
Heat Flow In Microelectronic Packaging
Heat flow in a hermetic package is well defined as illustrated in figure 1. In the diagram it is
seen that the die is attached to a ceramic substrate inside of a cavity. When the package is
assembled, the cavity is left intact, that is, only air or some other gas comes in contact with
the die surfaces not bonded to the cavity. Since the thermal conductivity of the ceramic is
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