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Index
élanSC520 Microcontroller Register Set Manual
Index-7
FIFO_MODE bit field, 18-12
FIRST_DLY bit field
in BOOTCSCTL register, 9-3
in ROMCS1CTL register, 9-5
in ROMCS2CTL register, 9-7
Floating Point Error Interrupt Clear register, 12-61
Floating Point Error Interrupt Mapping register, 12-21
Force Bad ECC Check Bits bit field, 7-12
FPUERR_RST bit field, 12-61
FPUERRCLR register, 12-61
Framing Error bit field, 18-22
FRC_BAD_CHK bit field, 7-12
Function Number bit field, 6-16
FUNCTION_NUM bit field, 6-16
G
General 0 register, 11-62
General 1 register, 11-66
General 2 register, 11-67
General 3 register, 11-68
General 4 register, 11-70
General 5 register, 11-74
General 6 register, 11-75
General 7 register, 11-76
General 8 register, 11-77
General-Purpose CMOS RAM (114 bytes), 17-21
General-Purpose Interrupt Request GPIRQx Polarity bit
field, 12-15, 12-16
General-Purpose R/W Register bit field
in GPDMAGR0 register, 11-62
in GPDMAGR1 register, 11-66
in GPDMAGR2 register, 11-67
in GPDMAGR3 register, 11-68
in GPDMAGR4 register, 11-70
in GPDMAGR5 register, 11-74
in GPDMAGR6 register, 11-75
in GPDMAGR7 register, 11-76
in GPDMAGR8 register, 11-77
general-purpose timer MMCR registers (table), 14-1
GNT_TO_ID bit field, 5-3
GNT_TO_INT_ENB bit field, 5-2
GNT_TO_STA bit field, 5-3
GNTx signal, 5-3, 5-4, 5-5, 5-7
GP Bus Echo Mode
Enable bit field, 10-2
minimum timing (table), 10-2
GP bus MMCR registers (table), 10-1
GP bus signal timing adjustment (figure), 10-7
GP Chip Select
Data Width register, 10-3
Offset register, 10-9
Pulse Width register, 10-8
Qualification register, 10-5
Recovery Time register, 10-7
GP Echo Mode register, 10-2
GP Read Offset register, 10-11
GP Read Pulse Width register, 10-10
GP Timer 0
Count register, 14-6
Interrupt Mapping register, 12-21
Maxcount Compare A register, 14-7
Maxcount Compare B register, 14-8
Mode/Control register, 14-3
GP Timer 1
Count register, 14-12
Interrupt Mapping register, 12-21
Maxcount Compare A register, 14-13
Maxcount Compare B register, 14-14
Mode/Control register, 14-9
GP Timer 2
Count register, 14-17
Interrupt Mapping register, 12-21
Maxcount Compare A register, 14-18
Mode/Control register, 14-15
GP Timer x Alternate Compare bit field
in GPTMR0CTL register, 14-5
in GPTMR1CTL register, 14-11
GP Timer x Continuous Mode bit field
in GPTMR0CTL register, 14-5
in GPTMR1CTL register, 14-11
in GPTMR2CTL register, 14-16
GP Timer x Count Register bit field
in GPTMR0CNT register, 14-6
in GPTMR1CNT register, 14-12
in GPTMR2CNT register, 14-17
GP Timer x Enable bit field
in GPTMR0CTL register, 14-3
in GPTMR1CTL register, 14-9
in GPTMR2CTL register, 14-15
GP Timer x External Clock bit field
in GPTMR0CTL register, 14-5
in GPTMR1CTL register, 14-11
GP Timer x Interrupt Enable bit field
in GPTMR0CTL register, 14-4
in GPTMR1CTL register, 14-10
in GPTMR2CTL register, 14-16
GP Timer x Interrupt Status bit field, 14-2
GP Timer x Maxcount Compare Register In Use bit field
in GPTMR0CTL register, 14-4
in GPTMR1CTL register, 14-10