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élanSC520 Microcontroller Register Set Manual
1-1
CHAPTER
1
CONFIGURATION REGISTER
OVERVIEW
The élanSC520 microcontroller has four different types of configuration registers:
I
Memory-Mapped Configuration Region (MMCR) Registers
—These are memory-
mapped peripherals and configuration registers that are specific to the élanSC520
microcontroller’s control and status functions, such as the SDRAM and GP bus controllers.
These registers are 8-bits, 16-bits, or 32-bits wide and reside in memory space.
I
Direct-Mapped Registers
—These include the Configuration Base Address (CBAR)
register, the PCI Configuration Address and Data (PCICFGADR and PCICFGDATA)
registers, and PC/AT-compatible peripherals. All direct-mapped I/O registers reside in
fixed I/O space. The CBAR, PCICFGADR, and PCICFGDATA registers are 32 bits wide.
All other direct-mapped peripheral configuration registers are 8 bits wide.
I
PCI Host Bridge Indexed Configuration Registers
—These registers are located in
the PCI bus configuration space, which is defined in the
PCI Local Bus Specification,
Revision 2.2, to be accessed through two 32-bit I/O locations at 0CF8h (index) and
0CFCh (data).
I
RTC Indexed Registers
—These registers are located in the PC/AT-compatible real-
time clock (RTC) configuration space, which is accessed using I/O ports 0070h (index)
and 0071h (data).
Register descriptions are organized within this manual by function, e.g., GP bus, SDRAM,
or UART. Each function’s chapter describes the MMCR registers first, followed by direct-
mapped, and then indexed register descriptions, if any. In each chapter, registers of each
type are listed in ascending hexadecimal order unless descriptions for identical registers
(for example, direct-mapped UART registers) are combined.
The remainder of this chapter presents an overview of the registers by type.
1.1
MEMORY-MAPPED CONFIGURATION REGION (MMCR) REGISTERS
The élanSC520 microcontroller’s memory-mapped configuration region (MMCR) contains
all internal peripheral control and configuration registers that are not defined as direct-
mapped I/O, PCI indexed, or RTC indexed registers.
After reset, the MMCR registers are located in the 4-Kbyte region in memory address space
from FFFEF000–FFFEFFFFh. The MMCR registers can be aliased to any 4-Kbyte region
in the lower 1-Gbyte address space (00000000h–1FFFFFFh) via the I/O-mapped CBAR
register (see page 2-9). The MMCR is available at its original location in high memory even
if it is aliased via the CBAR register. See the memory and I/O space chapter in the
élanSC520 Microcontroller User’s Manual
, order #22004, for more detail.
Table 1-1 on page 1-2 lists all the MMCR registers included in the élanSC520
microcontroller.