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Index
Index-4
élanSC520 Microcontroller Register Set Manual
Current Count High bit field, 16-5
Current Count Low bit field, 16-4
D
D_PERR_DET bit field, 6-20
dackx internal signal, 11-51, 11-87
DAKSEN bit field
in MSTDMACTL register, 11-87
in SLDMACTL register, 11-51
DAT_IN bit field, 19-7
DAT_OUT bit field, 19-4
Data Carrier Detect bit field, 18-23
Data Parity Reported bit field, 6-20
Data Ready bit field, 18-22
Data Set Ready bit field, 18-23
Data Terminal Ready bit field, 18-20
Data Width Select for GPCSx bit field, 10-3
DATA_DRIVE bit field, 20-11
DATASTRB signal, 7-2
Date Mode bit field, 17-17
DATE_MODE bit field, 17-17
DAY_OF_MTH bit field, 17-11
DAY_OF_WEEK bit field, 17-10
Daylight Savings Enable bit field, 17-17
DBCTL register, 8-2
DCD bit field, 18-23
DCD2 Function Select bit field, 20-5
DCDx signal, 18-19, 18-23
DCTS bit field, 18-24
DDCD bit field, 18-23
DDSR bit field, 18-24
Delta Clear To Send bit field, 18-24
Delta Data Carrier Detect bit field, 18-23
Delta Data Set Ready bit field, 18-24
DEV_ID bit field, 6-18
Device ID bit field, 6-18
Device Number bit field, 6-16
Device Select (DEVSEL) Timing bit field, 6-20
Device/Vendor ID register, 6-18
DEVICE_NUM bit field, 6-16
DEVSEL signal, 6-20
DGP bit field
in BOOTCSCTL register, 9-2
in ROMCS1CTL register, 9-4
in ROMCS2CTL register, 9-6
Directly Trigger Priority Level Px bit field
in SWINT16_1 register, 12-10, 12-11, 12-12
in SWINT22_17 register, 12-13, 12-14
direct-mapped I/O registers (table), 1-7
Disable DMA Controller bit field
in MSTDMACTL register, 11-87
in SLDMACTL register, 11-51
DIV bit field
in UARTxBCDH register, 18-10
in UARTxBCDL register, 18-9
Divisor Latch Access bit field, 18-17
DLAB bit field, 18-17
DMA. See alsoGP-DMA, Master DMA, Slave DMA.
DMA Buffer Chaining Interrupt Mapping register, 12-21
DMA Channel Mask bit field
in MSTDMAMSK register, 11-90
in SLDMAMSK register, 11-54
DMA Channel Mask Select bit field
in MSTDMAMSK register, 11-90
in SLDMAMSK register, 11-54
DMA Channel Select bit field
in MSTDMAMODE register, 11-92
in MSTDMASWREQ register, 11-89
in SLDMAMODE register, 11-56
in SLDMASWREQ register, 11-53
DMA Channel x Extended Page Address bit field
in GPDMAEXTPG0 register, 11-10
in GPDMAEXTPG1 register, 11-11
in GPDMAEXTPG2 register, 11-12
in GPDMAEXTPG3 register, 11-13
in GPDMAEXTPG5 register, 11-14
in GPDMAEXTPG6 register, 11-15
in GPDMAEXTPG7 register, 11-16
DMA Channel x Mask bit field
in MSTDMAGENMSK register, 11-97
in SLDMAGENMSK register, 11-61
DMA Channel x Memory Address bit field
in GPDMA4MAR register, 11-78
DMA Channel x Memory Address Bits [23–16] bit field
in GPDMA0PG register, 11-69
in GPDMA1PG register, 11-65
in GPDMA2PG register, 11-63
in GPDMA3PG register, 11-64
in GPDMA5PG register, 11-73
in GPDMA6PG register, 11-71
DMA Channel x Memory Address Bits [23–17] bit field
in GPDMA7PG register, 11-72
DMA Channel x Next Address High bit field
in GPDMANXTADDH3 register, 11-27
in GPDMANXTADDH5 register, 11-29
in GPDMANXTADDH6 register, 11-31
in GPDMANXTADDH7 register, 11-33
DMA Channel x Next Address Low bit field
in GPDMANXTADDL3 register, 11-26
in GPDMANXTADDL5 register, 11-28
in GPDMANXTADDL6 register, 11-30
in GPDMANXTADDL7 register, 11-32