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參數(shù)資料
| 型號： | DS3112+W |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 93/133頁 |
| 文件大小： | 0K |
| 描述： | IC MUX T3/E3 3.3V 256-PBGA |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 控制器類型： | 調(diào)幀器，多路復(fù)用器 |
| 接口： | 并行/串行 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 電流 - 電源： | 150mA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 256-LBGA |
| 供應(yīng)商設(shè)備封裝： | 256-PBGA（27x27） |
| 包裝： | 管件 |
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DS3112
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6
M13/E13/G.747 MULTIPLEXER AND T2/E2/G.747 FRAME
Note that if the DS3112 is used as a stand-alone T3/E3 framer and the multiplexer functionality is
disabled, then the registers and functionality described in this section are not applicable and should be
ignored by the host.
On the receive side, the T2/E2/G.747 framer locates the frame boundaries of the incoming T2/E2/G.747
data stream and monitors the data stream for alarms and errors. Alarms are detected and reported in
T2/E2 Status Registers (T2E2SR1 and T2E2SR2), which are described in Section 6.3. The host can force
the T2/E2/G.747 framer to resynchronize via the T2E2RSY control bit in the MRID register (Section
4.1). On the transmit side, the device formats the outgoing data stream with the proper framing pattern
and overhead and can generate alarms. It can also inject errors for diagnostic testing purposes. The
transmit side of the framer is called the “formatter.”
6.1 T1/E1 AIS Generation
The DS3112 can generate an Alarm Indication Signal (AIS) for the T1 and E1 data streams in both the
transmit and receive directions. AIS for T1 and E1 signals is defined as an unframed all ones pattern. On
reset, the DS3112 will force AIS in both the transmit and receive directions on all 28 T1 and 16/21 E1
data streams. It is the host’s task to configure the device to pass normal traffic via the T1E1RAIS1,
T1E1RAIS2, T1E1TAIS1, and T1E1TAIS2 registers (Section 6.4).
6.2 T2/E2/G.747 Framer Control Register Description
Register Name:
T2E2CR1
Register Description:
T2/E2 Control Register 1
Register Address:
30h
Bit #
7
6
5
4
3
2
1
0
Name
—
TRAI7
TRAI6
TRAI5
TRAI4
TRAI3
TRAI2
TRAI1
Default
—
0
Bit #
15
14
13
12
11
10
9
8
Name
—
TAIS7
TAIS6
TAIS5
TAIS4
TAIS3
TAIS2
TAIS1
Default
—
0
Note: Bits that are underlined are read-only; all other bits are read-write.
Bits 0 to 6: T2/E2/G.747 Transmit Remote Alarm Indication (TRAIn where n = 1 to 7). When this bit is set
high in the T3 mode, the X bit will be set to zero. When this bit is set high in the E3 mode, the RAI bit (bit number
11 of each E2 frame) will be set to a one. In the E3 mode, TRAI5 to TRAI7 (bits 4 to 6) are disabled and should be
set low by the host. When this bit is set high in the G.747 mode, the RAI bit (bit number 1 of Set 2 in each G.747
frame) will be set to a one. When this bit it set low in the T3 mode, the X bit will be set to a one. When this bit is
set low in the E3 and G.747 modes, the RAI bit will be set to zero.
0 = do not transmit RAI
1 = transmit RAI
Bits 8 to 14:T2/E2/G.747 Transmit Alarm Indication Signal (TAISn where n = 1 to 7). When this bit is set
high, the transmit formatter will generate an unframed all ones pattern. When this bit it set low, normal data is
transmitted. In the E3 mode, TAIS5 to TAIS7 (bits 4 to 6) are disabled and should be set low by the host.
0 = do not transmit AIS
1 = transmit AIS
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