參數(shù)資料
型號： DS3112+W
廠商： Maxim Integrated Products
文件頁數(shù)： 104/133頁
文件大?。?/td> 0K
描述： IC MUX T3/E3 3.3V 256-PBGA
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 40
控制器類型： 調(diào)幀器，多路復(fù)用器
接口： 并行/串行
電源電壓： 3.135 V ~ 3.465 V
電流 - 電源： 150mA
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 256-LBGA
供應(yīng)商設(shè)備封裝： 256-PBGA（27x27）
包裝： 管件
DS3112
72 of 133
Register Name:
T1E1DLB1
Register Description:
T1/E1 Diagnostic Loopback Control Register 1
Register Address:
54h
Bit #
7
6
5
4
3
2
1
0
Name
DLB8
DLB7
DLB6
DLB5
DLB4
DLB3
DLB2
DLB1
Default
0
Bit #
15
14
13
12
11
10
9
8
Name
DLB16
DLB15
DLB14
DLB13
DLB12
DLB11
DLB10
DLB9
Default
0
Note: Bits that are underlined are read-only; all other bits are read-write.
Bits 0 to 15: T1/E1 Diagnostic Loopback Enable for Ports 1 to 16 (DLB1 to DLB16). These bits enable or
disable the T1/E1 Diagnostic Loopback (DLB). See the block diagrams in Section 1 for a visual description of this
loopback. DLB1 corresponds to T1/E1 Port 1, DLB2 corresponds to T1/E1 Port 2, and so on. If the device is
configured in Low-Speed T1/E1 Port Loop Timed mode (if LLTM bit in the MC1 register is set to a one) then only
data will be looped back—the clock will not be looped back. Since ports 4, 8, 12, 16, 20, 24, and 28 are not active
in the G.747 mode, the DLB4, DLB8, DLB12, and DLB16 bits have no effect in the G.747 mode.
0 = disable loopback
1 = enable loopback
Register Name:
T1E1DLB2
Register Description:
T1/E1 Diagnostic Loopback Control Register 2
Register Address:
56h
Bit #
7
6
5
4
3
2
1
0
Name
DLB24
DLB23
DLB22
DLB21
DLB20
DLB19
DLB18
DLB17
Default
0
Bit #
15
14
13
12
11
10
9
8
Name
—
DLB28
DLB27
DLB26
DLB25
Default
—
0
Note: Bits that are underlined are read-only; all other bits are read-write.
Bits 17 to 28: T1 Diagnostic Loopback Enable for Ports 17 to 28 (DLB17 to DLB28). These bits enable or
disable the T1 Diagnostic Loopback (DLB). See the block diagrams in Section 1 for a visual description of this
loopback. DLB1 corresponds to T17 Port 17, DLB18 corresponds to T1 Port 18, and so on. Since ports 17 to 28 are
not active in the E3 mode, these bits have no effect in the E3 mode. Since ports 4, 8, 12, 16, 20, 24, and 28 are not
active in the G.747 Mode, the DLB20, DLB24 and DLB28 bits have no affect in the G.747 mode. If the device is
configured in Low-Speed T1/E1 Port Loop Timed mode (if LLTM bit in the MC1 register is set to a one), then
only data will be looped back, the clock will not be looped back.
0 = disable loopback
1 = enable loopback
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