
CYNSE70064A
Document #: 38-02041 Rev. *E
Page 30 of 127
The following is the sequence of operation for a single 68-bit Search command (also refer to “Command and Command Param-
eters,” Subsection 10.2 on page 18).
Cycle A
: The host ASIC drives the CMDV HIGH and applies Search command code (10) to CMD[1:0] signals. CMD[5:3]
signals must be driven with the index to the GMR pair for use in this Search operation. CMD[8:7] signals must be driven with
the same bits that will be driven on SADR[21:20] by this device if it has a hit. DQ[67:0] must be driven with the 68-bit data to
be compared. The CMD[2] signal must be driven to logic 0.
Cycle B
: The host ASIC continues to drive the CMDV HIGH and to apply Search command (10) on CMD[1:0]. CMD[5:2] must
be driven by the index of the comparand register pair for storing the 136-bit word presented on the DQ bus during cycles A
and B. CMD[8:6] signals must be driven with the index of the SSR that will be used for storing the address of the matching
entry and hit flag (see page 14 for a description of SSR[0:7]). The DQ[67:0] continues to carry the 68-bit data to be compared.
cycle
1
CLK2X
CMDV
CMD[1:0]
DQ
CE_L
OE_L
on this
device)
CMD[8:2]
Search2
Search4
cycle
2
cycle
3
cycle
4
cycle
5
cycle
6
cycle
7
cycle
8
cycle
9
cycle
10
CFG = 00000000, HLAT = 010, TLSZ = 01, LRAM = 1, LDEV = 1.
Note: |(LHI[6:0]) stands for the boolean ‘OR’ of the entire bus LHI[6:0].
Note: Each bit in LHO[1:0] is the same logical signal.
PHS_L
SADR[21:0]
SSF
SSV
(Miss
Search2
(Miss
on this
device.
Search3
(Local
winner
but not
global
winner.)
D1
D2
D3
D4
01
01
01
01
Search1
Search3
A B A B A B A B
A4
0
|(LHI[6:0])
LHO[1:0]
)
0
z
0
0
z
0
ALE_L
WE_L
1
z
1
0
z
1
0
0
z
1
0
Search4
(Global
winner.)
z
Figure 10-11. Timing Diagram for 68-bit Search Device Number 7 (Last Device)