
CYNSE70064A
Document #: 38-02041 Rev. *E
Page 24 of 127
The following is the sequence of operation for a single 68-bit Search command (also refer to Command and Command Param-
eters, Subsection 10.2 on page 18).
Cycle A
: The host ASIC drives the CMDV HIGH and applies Search command code (10) on CMD[1:0] signals. CMD[5:3]
signals must be driven with the index to the GMR pair for use in this Search operation. CMD[8:7] signals must be driven with
the same bits that will be driven on SADR[21:20] by this device if it has a hit. DQ[67:0] must be driven with the 68-bit data to
be compared. The CMD[2] signal must be driven to logic 0.
Cycle B
: The host ASIC continues to drive the CMDV HIGH and to apply Search command (10) on CMD[1:0]. CMD[5:2] must
be driven by the index of the comparand register pair for storing the 136-bit word presented on the DQ bus during cycles A
and B. CMD[8:6] signals must be driven with the index of the SSR that will be used for storing the address of the matching
entry and the hit flag (see page 14 for information on SSR[0:7]). The DQ[67:0] continues to carry the 68-bit data to be compared.
cycle
1
CLK2X
CMDV
CMD[1:0]
DQ
CE_L
OE_L
Hit
Hit
Miss
Miss
CMD[8:2]
Search2
Search4
WE_L
cycle
2
cycle
3
cycle
4
cycle
5
cycle
6
cycle
7
cycle
8
cycle
9
cycle
10
CFG = 00000000, HLAT = 000, TLSZ = 00, LRAM = 1, LDEV = 1.
Figure 10-5. Timing Diagram for 68-bit Search in
x
68 Table (One Device)
PHS_L
SADR[21:0]
SSF
SSV
ALE_L
SearcSearSearSearch4
D1
D2
D3
D4
A1
A3
01
01
01
01
Search1
Search3
A B A B A B A B
0
1
0
0
1
1
0
1
1
0
0
0
1
0
1
1
0
1
1
0
0
0
1
0
0
1
1
1
LHO[0]
6
5
4
3
2
1
0
LHI
LHO[1]
BHI[2:0]
DQ[67:0]
CMDV, CMD8:0]
SRAM
CYNSE70064A
BHI[2:0]
SSF, SSV
Figure 10-6. Hardware Diagram for 68-bit Search in
x
68 Table (One Device)