
Debug Support
8-20
Copyright 1999, 2000 ARM Limited. All rights reserved.
ARM DDI 0144B
During the UPDATE-DR state, the value in the register selects a scan chain to become
the currently active scan chain. All following instructions such as INTEST then apply
to that scan chain.
The currently selected scan chain only changes when a SCAN_N instruction is
executed, or a reset occurs. On reset, scan chain 3 is selected as the active scan chain.
The number of the currently selected scan chain is reflected on the
SCREG[4:0]
output
bus. The TAP controller can be used to drive external scan chains in addition to those
within the ARM940T macrocell. The external scan chain must be assigned a number
and control signals for it, and can be derived from
SCREG[4:0]
,
IR[3:0]
,
TAPSM[3:0]
,
TCK1
, and
TCK2
.
The list of scan chain numbers allocated by ARM is shown in Table 8-3 on page 8-20.
An external scan chain can take any other number. The serial data stream applied to the
external scan chain is made present on
SDINBS
. The serial data back from the scan
chain must be presented to the TAP controller on the
SDOUTBS
input.
The scan chain present between
SDINBS
and
SDOUTBS
is connected between
TDI
and
TDO
whenever scan chain 3 is selected, or when any of the unassigned scan chain
numbers is selected. If there is more than one external scan chain, a multiplexor must
be built externally to apply the desired scan chain output to
SDOUTBS
. The
multiplexor can be controlled by decoding
SCREG[4:0]
.
Table 8-3 Scan chain number allocation
Scan chain
number
Function
0
Macrocell scan test
1
Debug
2
EmbeddedICE unit programming
3
External boundary scan
4
ICache CAM
5
DCache CAM
6-14
Reserved
15
Control coprocessor
16
–
31
Unassigned